| /art/compiler/utils/ |
| D | assembler_thumb_test.cc | 212 __ mov(R8, ShifterOperand(R9)); in TEST_F()
215 __ mov(R8, ShifterOperand(9)); in TEST_F()
224 __ mov(R8, ShifterOperand(R9)); in TEST_F()
270 __ mov(R1, ShifterOperand(R8), AL, kCcKeep); in TEST_F()
272 __ mov(R8, ShifterOperand(R9), AL, kCcKeep); in TEST_F()
273 __ add(R1, R1, ShifterOperand(R8), AL, kCcKeep); in TEST_F()
275 __ add(R8, R8, ShifterOperand(R9), AL, kCcKeep); in TEST_F()
277 __ cmp(R8, ShifterOperand(R1)); in TEST_F()
278 __ cmp(R9, ShifterOperand(R8)); in TEST_F()
286 __ movs(R0, ShifterOperand(R8)); in TEST_F()
[all …]
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| /art/runtime/arch/x86_64/ |
| D | registers_x86_64.h | 38 R8 = 8, enumerator
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| D | quick_method_frame_info_x86_64.h | 33 (1 << art::x86_64::R8) | (1 << art::x86_64::R9);
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| D | context_x86_64.cc | 70 gprs_[R8] = nullptr; in SmashCallerSaves()
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| /art/compiler/utils/arm/ |
| D | managed_register_arm_test.cc | 48 reg = ArmManagedRegister::FromCoreRegister(R8); in TEST()
55 EXPECT_EQ(R8, reg.AsCoreRegister()); in TEST()
316 ArmManagedRegister reg_R8 = ArmManagedRegister::FromCoreRegister(R8); in TEST()
319 EXPECT_TRUE(reg_R8.Equals(ArmManagedRegister::FromCoreRegister(R8))); in TEST()
463 EXPECT_TRUE(!reg.Overlaps(ArmManagedRegister::FromCoreRegister(R8))); in TEST()
485 EXPECT_TRUE(!reg.Overlaps(ArmManagedRegister::FromCoreRegister(R8))); in TEST()
507 EXPECT_TRUE(!reg.Overlaps(ArmManagedRegister::FromCoreRegister(R8))); in TEST()
529 EXPECT_TRUE(!reg.Overlaps(ArmManagedRegister::FromCoreRegister(R8))); in TEST()
551 EXPECT_TRUE(!reg.Overlaps(ArmManagedRegister::FromCoreRegister(R8))); in TEST()
573 EXPECT_TRUE(!reg.Overlaps(ArmManagedRegister::FromCoreRegister(R8))); in TEST()
[all …]
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| D | assembler_arm32_test.cc | 73 new arm::Register(arm::R8), in SetUpHelpers()
91 new arm::Register(arm::R8), in SetUpHelpers()
153 shifter_operands_.push_back(arm::ShifterOperand(arm::R8)); in SetUpHelpers()
163 shifter_operands_.push_back(arm::ShifterOperand(arm::R8)); in SetUpHelpers()
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| D | assembler_thumb2_test.cc | 57 new arm::Register(arm::R8), in SetUpHelpers()
225 __ eor(arm::R1, arm::R8, arm::ShifterOperand(arm::R0)); in TEST_F()
226 __ eor(arm::R8, arm::R1, arm::ShifterOperand(arm::R0)); in TEST_F()
227 __ eor(arm::R1, arm::R0, arm::ShifterOperand(arm::R8)); in TEST_F()
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| D | assembler_arm.h | 1023 return r < R8; in IsLowRegister()
1027 return r >= R8; in IsHighRegister()
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| /art/runtime/arch/arm/ |
| D | registers_arm.h | 35 R8 = 8, enumerator
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| D | quick_method_frame_info_arm.h | 31 (1 << art::arm::R5) | (1 << art::arm::R6) | (1 << art::arm::R7) | (1 << art::arm::R8) |
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| /art/compiler/jni/quick/x86_64/ |
| D | calling_convention_x86_64.cc | 87 case 3: res = X86_64ManagedRegister::FromCpuRegister(R8); break; in CurrentParamRegister()
179 case 4: res = X86_64ManagedRegister::FromCpuRegister(R8); break; in CurrentParamRegister()
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| /art/compiler/jni/quick/arm/ |
| D | calling_convention_arm.cc | 230 callee_save_regs_.push_back(ArmManagedRegister::FromCoreRegister(R8)); in ArmJniCallingConvention()
242 result = 1 << R5 | 1 << R6 | 1 << R7 | 1 << R8 | 1 << R10 | 1 << R11 | 1 << LR; in CoreSpillMask()
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| /art/compiler/utils/x86_64/ |
| D | assembler_x86_64_test.cc | 153 registers_.push_back(new x86_64::CpuRegister(x86_64::R8)); in SetUpHelpers()
170 secondary_register_names_.emplace(x86_64::CpuRegister(x86_64::R8), "r8d"); in SetUpHelpers()
187 tertiary_register_names_.emplace(x86_64::CpuRegister(x86_64::R8), "r8w"); in SetUpHelpers()
204 quaternary_register_names_.emplace(x86_64::CpuRegister(x86_64::R8), "r8b"); in SetUpHelpers()
695 x86_64::CpuRegister(x86_64::R8)); in TEST_F()
720 x86_64::CpuRegister(x86_64::R8)); in TEST_F()
741 GetAssembler()->movl(x86_64::CpuRegister(x86_64::R8), x86_64::Address( in TEST_F()
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| D | assembler_x86_64.cc | 1533 if (r != nullptr && *r >= Register::R8 && *r < Register::kNumberOfCpuRegisters) {
1537 if (x != nullptr && *x >= Register::R8 && *x < Register::kNumberOfCpuRegisters) {
1541 if (b != nullptr && *b >= Register::R8 && *b < Register::kNumberOfCpuRegisters) {
1563 if (dst != nullptr && *dst >= Register::R8 && *dst < Register::kNumberOfCpuRegisters) {
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| /art/compiler/optimizing/ |
| D | code_generator_x86_64.h | 37 static constexpr Register kParameterCoreRegisters[] = { RSI, RDX, RCX, R8, R9 };
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| D | code_generator_arm.cc | 52 { R5, R6, R7, R8, R10, R11, LR };
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