/art/compiler/optimizing/ |
D | code_generator_x86_64.cc | 805 __ movq(reg, Address(CpuRegister(RSP), kCurrentMethodStackOffset)); in GenerateStaticOrDirectCall() 950 __ movq(Address(CpuRegister(RSP), stack_index), CpuRegister(reg_id)); in SaveCoreRegister() 955 __ movq(CpuRegister(reg_id), Address(CpuRegister(RSP), stack_index)); in RestoreCoreRegister() 960 __ movsd(Address(CpuRegister(RSP), stack_index), XmmRegister(reg_id)); in SaveFloatingPointRegister() 965 __ movsd(XmmRegister(reg_id), Address(CpuRegister(RSP), stack_index)); in RestoreFloatingPointRegister() 1030 blocked_core_registers_[RSP] = true; in SetupBlockedRegisters() 1053 CpuRegister(RSP), -static_cast<int32_t>(GetStackOverflowReservedBytes(kX86_64)))); in GenerateFrameEntry() 1071 __ subq(CpuRegister(RSP), Immediate(adjust)); in GenerateFrameEntry() 1079 __ movsd(Address(CpuRegister(RSP), offset), XmmRegister(kFpuCalleeSaves[i])); in GenerateFrameEntry() 1084 __ movq(Address(CpuRegister(RSP), kCurrentMethodStackOffset), in GenerateFrameEntry() [all …]
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D | intrinsics_x86_64.cc | 2424 __ popcntq(out, Address(CpuRegister(RSP), src.GetStackIndex())); in GenBitCount() 2427 __ popcntl(out, Address(CpuRegister(RSP), src.GetStackIndex())); in GenBitCount() 2500 __ bsrq(tmp, Address(CpuRegister(RSP), src.GetStackIndex())); in GenOneBit() 2503 __ bsrl(tmp, Address(CpuRegister(RSP), src.GetStackIndex())); in GenOneBit() 2528 __ movq(tmp, Address(CpuRegister(RSP), src.GetStackIndex())); in GenOneBit() 2531 __ movl(tmp, Address(CpuRegister(RSP), src.GetStackIndex())); in GenOneBit() 2615 __ bsrq(out, Address(CpuRegister(RSP), src.GetStackIndex())); in GenLeadingZeros() 2618 __ bsrl(out, Address(CpuRegister(RSP), src.GetStackIndex())); in GenLeadingZeros() 2689 __ bsfq(out, Address(CpuRegister(RSP), src.GetStackIndex())); in GenTrailingZeros() 2692 __ bsfl(out, Address(CpuRegister(RSP), src.GetStackIndex())); in GenTrailingZeros()
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D | code_generator_x86_64.h | 516 assembler_.lock()->addl(Address(CpuRegister(RSP), 0), Immediate(0));
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/art/compiler/utils/x86_64/ |
D | assembler_x86_64.cc | 2335 movsd(dst, Address(CpuRegister(RSP), 0)); in LoadDoubleConstant() 2336 addq(CpuRegister(RSP), Immediate(2 * sizeof(intptr_t))); in LoadDoubleConstant() 2661 subq(CpuRegister(RSP), Immediate(rest_of_frame)); in BuildFrame() 2670 movsd(Address(CpuRegister(RSP), offset), spill.AsXmmRegister()); in BuildFrame() 2677 movq(Address(CpuRegister(RSP), 0), method_reg.AsX86_64().AsCpuRegister()); in BuildFrame() 2683 movq(Address(CpuRegister(RSP), frame_size + spill.getSpillOffset()), in BuildFrame() 2687 …movl(Address(CpuRegister(RSP), frame_size + spill.getSpillOffset()), spill.AsX86_64().AsCpuRegiste… in BuildFrame() 2691 …movsd(Address(CpuRegister(RSP), frame_size + spill.getSpillOffset()), spill.AsX86_64().AsXmmRegist… in BuildFrame() 2694 …movss(Address(CpuRegister(RSP), frame_size + spill.getSpillOffset()), spill.AsX86_64().AsXmmRegist… in BuildFrame() 2711 movsd(spill.AsXmmRegister(), Address(CpuRegister(RSP), offset)); in RemoveFrame() [all …]
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D | assembler_x86_64.h | 180 CHECK_EQ(base_in.AsRegister(), RSP); in Address() 181 Init(CpuRegister(RSP), disp.Int32Value()); in Address() 191 if (base_in.LowBits() == RSP) { in Init() 192 SetSIB(TIMES_1, CpuRegister(RSP), base_in); in Init() 196 if (base_in.LowBits() == RSP) { in Init() 197 SetSIB(TIMES_1, CpuRegister(RSP), base_in); in Init() 202 if (base_in.LowBits() == RSP) { in Init() 203 SetSIB(TIMES_1, CpuRegister(RSP), base_in); in Init() 211 CHECK_NE(index_in.AsRegister(), RSP); // Illegal addressing mode. in Address() 212 SetModRM(0, CpuRegister(RSP)); in Address() [all …]
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D | assembler_x86_64_test.cc | 150 registers_.push_back(new x86_64::CpuRegister(x86_64::RSP)); in SetUpHelpers() 167 secondary_register_names_.emplace(x86_64::CpuRegister(x86_64::RSP), "esp"); in SetUpHelpers() 184 tertiary_register_names_.emplace(x86_64::CpuRegister(x86_64::RSP), "sp"); in SetUpHelpers() 201 quaternary_register_names_.emplace(x86_64::CpuRegister(x86_64::RSP), "spl"); in SetUpHelpers() 1194 GetAssembler()->filds(x86_64::Address(x86_64::CpuRegister(x86_64::RSP), 4)); in TEST_F() 1195 GetAssembler()->fildl(x86_64::Address(x86_64::CpuRegister(x86_64::RSP), 12)); in TEST_F() 1203 GetAssembler()->fistps(x86_64::Address(x86_64::CpuRegister(x86_64::RSP), 16)); in TEST_F() 1204 GetAssembler()->fistpl(x86_64::Address(x86_64::CpuRegister(x86_64::RSP), 24)); in TEST_F() 1415 x86_64::Address(x86_64::CpuRegister(x86_64::RSP), 4)); in TEST_F() 1433 x86_64::Address(x86_64::CpuRegister(x86_64::RSP), 4)); in TEST_F()
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/art/runtime/arch/x86_64/ |
D | context_x86_64.cc | 30 gprs_[RSP] = &rsp_; in Reset() 33 rsp_ = X86_64Context::kBadGprBase + RSP; in Reset() 117 uintptr_t rsp = gprs[kNumberOfCpuRegisters - RSP - 1] - sizeof(intptr_t); in DoLongJump()
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D | registers_x86_64.h | 34 RSP = 4, enumerator
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D | context_x86_64.h | 40 SetGPR(RSP, new_sp); in SetSP()
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