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Searched refs:SET_VREG_WIDE (Results 1 – 25 of 41) sorted by relevance

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/art/runtime/interpreter/mterp/arm64/
Dop_move_wide_16.S7 SET_VREG_WIDE x3, w2
Dop_const_wide_16.S7 SET_VREG_WIDE x0, w3
Dop_const_wide_high16.S6 SET_VREG_WIDE x0, w1
Dop_move_wide_from16.S8 SET_VREG_WIDE x3, w2
Dop_move_wide.S8 SET_VREG_WIDE x3, w2
Dop_move_result_wide.S8 SET_VREG_WIDE x0, x2 // fp[AA]<- r0
DunopWide.S16 SET_VREG_WIDE x0, w4
DfunopWider.S16 SET_VREG_WIDE $tgtreg, w4 // vA<- d0
DfunopWide.S16 SET_VREG_WIDE $tgtreg, w4 // vA<- d0
Dop_const_wide_32.S9 SET_VREG_WIDE x0, w3
Dop_rem_double_2addr.S10 SET_VREG_WIDE d0, w2 // vAA<- result define
DbinopWide2addr.S27 SET_VREG_WIDE $r0, w2 // vAA<- result
Dop_rem_double.S11 SET_VREG_WIDE d0, w4 // vAA<- result define
DshiftWide2addr.S14 SET_VREG_WIDE x0, w2 // vAA<- result
Dop_iget_wide_quick.S10 SET_VREG_WIDE x0, w2
Dop_sget_wide.S17 SET_VREG_WIDE x0, w4
DbinopWide.S28 SET_VREG_WIDE $result, w4 // vAA<- $result
DshiftWide.S18 SET_VREG_WIDE x0, w3 // vAA<- x0
Dop_const_wide.S12 SET_VREG_WIDE x0, w4
Dop_iget_wide.S18 SET_VREG_WIDE x0, w2
/art/runtime/interpreter/mterp/mips64/
Dop_const_wide_16.S6 SET_VREG_WIDE a0, a2 # vAA <- +BBBB
Dop_move_wide_from16.S8 SET_VREG_WIDE a0, a2 # vAA <- vBBBB
Dop_move_wide_16.S8 SET_VREG_WIDE a0, a2 # vAAAA <- vBBBB
Dop_move_wide.S8 SET_VREG_WIDE a0, a2 # vA <- vB
Dop_const_wide_high16.S7 SET_VREG_WIDE a0, a2 # vAA <- +BBBB000000000000

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