Searched refs:CTRL (Results 1 – 9 of 9) sorted by relevance
25 volatile uint32_t CTRL; member108 …MPU->CTRL = 0x07; //MPU on, even during faults, supervisor default: allow, user default: default d… in mpuStart()
299 SysTick->CTRL = 0; in platInitialize()302 SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | SysTick_CTRL_TICKINT_Msk | SysTick_CTRL_ENABLE_Msk; in platInitialize()437 SysTick->CTRL &= ~(SysTick_CTRL_TICKINT_Msk | SysTick_CTRL_ENABLE_Msk); in sleepClockRtcPrepare()444 SysTick->CTRL |= SysTick_CTRL_TICKINT_Msk | SysTick_CTRL_ENABLE_Msk; in sleepClockRtcWake()458 SysTick->CTRL &= ~(SysTick_CTRL_TICKINT_Msk | SysTick_CTRL_ENABLE_Msk); in sleepClockTmrPrepare()470 SysTick->CTRL |= SysTick_CTRL_TICKINT_Msk | SysTick_CTRL_ENABLE_Msk; in sleepClockTmrWake()
462 …__IO uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member513 …__IO uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register … member803 SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | in SysTick_Config()
481 …__IO uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member532 …__IO uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register … member823 SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | in SysTick_Config()
441 …__IO uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member692 SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | in SysTick_Config()
612 …__IO uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member763 …__IO uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register … member1063 …__IO uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register … member1559 SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | in SysTick_Config()
592 …__IO uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member743 …__IO uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register … member1043 …__IO uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register … member1539 SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | in SysTick_Config()
652 …__IO uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member803 …__IO uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register … member1103 …__IO uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register … member1711 SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | in SysTick_Config()
833 …__IO uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member984 …__IO uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register … member1287 …__IO uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register … member2130 SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | in SysTick_Config()