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Searched refs:CCR (Results 1 – 12 of 12) sorted by relevance

/external/curl/src/
DMakefile.vc6121 CCR = cl.exe $(RTLIB) /O2 /DNDEBUG
363 $(CCR) $(CFLAGS) /Fo"$@" ../lib/nonblock.c
365 $(CCR) $(CFLAGS) /Fo"$@" ../lib/rawstr.c
367 $(CCR) $(CFLAGS) /Fo"$@" ../lib/strtoofft.c
369 $(CCR) $(CFLAGS) /Fo"$@" ../lib/warnless.c
371 $(CCR) $(CFLAGS) /Fo"$@" tool_binmode.c
373 $(CCR) $(CFLAGS) /Fo"$@" tool_bname.c
375 $(CCR) $(CFLAGS) /Fo"$@" tool_cb_dbg.c
377 $(CCR) $(CFLAGS) /Fo"$@" tool_cb_hdr.c
379 $(CCR) $(CFLAGS) /Fo"$@" tool_cb_prg.c
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/external/autotest/client/tests/dacapo/
Dcontrol13 National Science Foundation ITR Grant, CCR-0085792.
/external/llvm/lib/Target/AVR/
DAVRRegisterInfo.td212 def CCR : RegisterClass<"AVR", [i8], 8, (add SREG)>
/external/llvm/lib/Target/Mips/
DMipsRegisterInfo.td386 def CCR : RegisterClass<"Mips", [i32], 32, (sequence "FCR%u", 0, 31)>,
562 def CCROpnd : RegisterOperand<CCR> {
/external/llvm/lib/Target/ARM/
DARMISelLowering.cpp3435 SDValue CCR = DAG.getRegister(ARM::CPSR, MVT::i32); in LowerXALUO() local
3443 ARMcc, CCR, OverflowCmp); in LowerXALUO()
3466 SDValue CCR = DAG.getRegister(ARM::CPSR, MVT::i32); in LowerSELECT() local
3469 return getCMOV(dl, VT, SelectTrue, SelectFalse, ARMcc, CCR, in LowerSELECT()
3501 SDValue CCR = Cond.getOperand(3); in LowerSELECT() local
3504 return getCMOV(dl, VT, True, False, ARMcc, CCR, Cmp, DAG); in LowerSELECT()
3569 SDValue TrueVal, SDValue ARMcc, SDValue CCR, in getCMOV() argument
3583 ARMcc, CCR, Cmp); in getCMOV()
3585 ARMcc, CCR, duplicateCmp(Cmp, DAG)); in getCMOV()
3589 return DAG.getNode(ARMISD::CMOV, dl, VT, FalseVal, TrueVal, ARMcc, CCR, in getCMOV()
[all …]
DARMISelLowering.h638 SDValue ARMcc, SDValue CCR, SDValue Cmp,
DARMRegisterInfo.td263 def CCR : RegisterClass<"ARM", [i32], 32, (add CPSR)> {
DARMInstrFormats.td170 def cc_out : OptionalDefOperand<OtherVT, (ops CCR), (ops (i32 zero_reg))> {
178 def s_cc_out : OptionalDefOperand<OtherVT, (ops CCR), (ops (i32 CPSR))> {
DARMInstrInfo.td2245 [/*(ARMbrcond bb:$target, imm:$cc, CCR:$ccr)*/]>,
/external/libunwind/src/ptrace/
D_UPT_reg_offset.c424 [UNW_PPC32_CCR] = UNW_PPC_PT(CCR)
/external/llvm/lib/Target/AArch64/
DAArch64RegisterInfo.td205 def CCR : RegisterClass<"AArch64", [i32], 32, (add NZCV)> {
208 // CCR is not allocatable.
/external/llvm/lib/Target/X86/
DX86RegisterInfo.td455 def CCR : RegisterClass<"X86", [i32], 32, (add EFLAGS)> {