| /external/llvm/lib/Target/X86/ |
| D | X86FastISel.cpp | 1811 EVT CmpVT = TLI.getValueType(DL, CmpLHS->getType()); in X86FastEmitCMoveSelect() local
1813 if (!X86FastEmitCompare(CmpLHS, CmpRHS, CmpVT, CI->getDebugLoc())) in X86FastEmitCMoveSelect()
2019 EVT CmpVT = TLI.getValueType(DL, CmpLHS->getType()); in X86FastEmitPseudoSelect() local
2020 if (!X86FastEmitCompare(CmpLHS, CmpRHS, CmpVT, CI->getDebugLoc())) in X86FastEmitPseudoSelect()
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 4616 EVT CmpVT = Op0.getValueType().changeVectorElementTypeToInteger(); in LowerVSETCC() local
4621 if (CmpVT.getVectorElementType() == MVT::i64) in LowerVSETCC()
4652 Op0 = DAG.getNode(ARMISD::VCGT, dl, CmpVT, TmpOp1, TmpOp0); in LowerVSETCC()
4653 Op1 = DAG.getNode(ARMISD::VCGT, dl, CmpVT, TmpOp0, TmpOp1); in LowerVSETCC()
4661 Op0 = DAG.getNode(ARMISD::VCGT, dl, CmpVT, TmpOp1, TmpOp0); in LowerVSETCC()
4662 Op1 = DAG.getNode(ARMISD::VCGE, dl, CmpVT, TmpOp0, TmpOp1); in LowerVSETCC()
4696 Op0 = DAG.getNode(ISD::BITCAST, dl, CmpVT, AndOp.getOperand(0)); in LowerVSETCC()
4697 Op1 = DAG.getNode(ISD::BITCAST, dl, CmpVT, AndOp.getOperand(1)); in LowerVSETCC()
4723 Result = DAG.getNode(ARMISD::VCEQZ, dl, CmpVT, SingleOp); break; in LowerVSETCC()
4725 Result = DAG.getNode(ARMISD::VCGEZ, dl, CmpVT, SingleOp); break; in LowerVSETCC()
[all …]
|
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 6681 EVT CmpVT = LHS.getValueType().changeVectorElementTypeToInteger(); in LowerVSETCC() local
6688 EmitVectorComparison(LHS, RHS, AArch64CC, false, CmpVT, dl, DAG); in LowerVSETCC()
6706 EmitVectorComparison(LHS, RHS, CC1, NoNaNs, CmpVT, dl, DAG); in LowerVSETCC()
6712 EmitVectorComparison(LHS, RHS, CC2, NoNaNs, CmpVT, dl, DAG); in LowerVSETCC()
6716 Cmp = DAG.getNode(ISD::OR, dl, CmpVT, Cmp, Cmp2); in LowerVSETCC()
8178 EVT CmpVT = InfoAndKind.IsAArch64 in performSetccAddFolding() local
8181 if (CmpVT != MVT::i32 && CmpVT != MVT::i64) in performSetccAddFolding()
9511 EVT CmpVT = N0.getOperand(0).getValueType(); in performVSelectCombine() local
9514 if (ResVT.getSizeInBits() != CmpVT.getSizeInBits()) in performVSelectCombine()
9520 DAG.getSetCC(SDLoc(N), CmpVT.changeVectorElementTypeToInteger(), in performVSelectCombine()
|
| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 6032 EVT CmpVT = Op.getOperand(0).getValueType(); in LowerSELECT_CC() local
6078 Cmp = DAG.getNode(ISD::FSUB, dl, CmpVT, LHS, RHS, &Flags); in LowerSELECT_CC()
6088 Cmp = DAG.getNode(ISD::FSUB, dl, CmpVT, LHS, RHS, &Flags); in LowerSELECT_CC()
6094 Cmp = DAG.getNode(ISD::FSUB, dl, CmpVT, LHS, RHS, &Flags); in LowerSELECT_CC()
6100 Cmp = DAG.getNode(ISD::FSUB, dl, CmpVT, RHS, LHS, &Flags); in LowerSELECT_CC()
6106 Cmp = DAG.getNode(ISD::FSUB, dl, CmpVT, RHS, LHS, &Flags); in LowerSELECT_CC()
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeDAG.cpp | 3818 EVT CmpVT = Tmp1.getValueType(); in ExpandNode() local
3823 TLI.getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), CmpVT); in ExpandNode()
|