Home
last modified time | relevance | path

Searched refs:EDX (Results 1 – 25 of 76) sorted by relevance

1234

/external/mesa3d/src/mesa/x86/
D3dnow_xform3.S48 MOV_L ( REGOFF(V4F_COUNT, EAX), EDX )
49 MOV_L ( EDX, REGOFF(V4F_COUNT, ECX) )
53 MOV_L ( REGOFF(V4F_START, ECX), EDX )
62 PREFETCHW ( REGIND(EDX) )
67 PREFETCHW ( REGOFF(32, EDX) ) /* prefetch 2 vertices ahead */
100 ADD_L ( CONST(16), EDX ) /* next output vertex */
103 MOVQ ( MM2, REGOFF(-16, EDX) ) /* write r0, r1 */
106 MOVQ ( MM5, REGOFF(-8, EDX) ) /* write r2, r3 */
133 MOV_L ( REGOFF(V4F_COUNT, EAX), EDX )
134 MOV_L ( EDX, REGOFF(V4F_COUNT, ECX) )
[all …]
D3dnow_xform4.S48 MOV_L ( REGOFF(V4F_COUNT, EAX), EDX )
49 MOV_L ( EDX, REGOFF(V4F_COUNT, ECX) )
53 MOV_L ( REGOFF(V4F_START, ECX), EDX )
62 PREFETCHW ( REGIND(EDX) )
67 PREFETCHW ( REGOFF(32, EDX) ) /* prefetch 2 vertices ahead */
82 ADD_L ( CONST(16), EDX ) /* next r */
112 MOVQ ( MM6, REGOFF(-16, EDX) )
114 MOVQ ( MM7, REGOFF(-8, EDX) )
141 MOV_L ( REGOFF(V4F_COUNT, EAX), EDX )
142 MOV_L ( EDX, REGOFF(V4F_COUNT, ECX) )
[all …]
D3dnow_xform1.S48 MOV_L ( REGOFF(V4F_COUNT, EAX), EDX )
49 MOV_L ( EDX, REGOFF(V4F_COUNT, ECX) )
53 MOV_L ( REGOFF(4, ECX), EDX )
81 MOVQ ( MM4, REGIND(EDX) ) /* write r1, r0 */
83 MOVQ ( MM5, REGOFF(8, EDX) ) /* write r3, r2 */
86 ADD_L ( CONST(16), EDX ) /* next r */
113 MOV_L ( REGOFF(V4F_COUNT, EAX), EDX )
114 MOV_L ( EDX, REGOFF(V4F_COUNT, ECX) )
118 MOV_L ( REGOFF(4, ECX), EDX )
133 MOVD ( MM0, REGIND(EDX) ) /* | r0 */
[all …]
D3dnow_xform2.S48 MOV_L ( REGOFF(V4F_COUNT, EAX), EDX )
49 MOV_L ( EDX, REGOFF(V4F_COUNT, ECX) )
53 MOV_L ( REGOFF(V4F_START, ECX), EDX )
89 MOVQ ( MM6, REGIND(EDX) ) /* write r1, r0 */
101 MOVQ ( MM6, REGOFF(8, EDX) ) /* write r3, r2 */
102 ADD_L ( CONST(16), EDX ) /* next r */
129 MOV_L ( REGOFF(V4F_COUNT, EAX), EDX )
130 MOV_L ( EDX, REGOFF(V4F_COUNT, ECX) )
134 MOV_L ( REGOFF(V4F_START, ECX), EDX )
154 MOVQ ( MM4, REGIND(EDX) ) /* write r1, r0 */
[all …]
D3dnow_normal.S58 MOV_L ( REGOFF(V4F_START, ESI), EDX ) /* in->start */
71 PUSH_L ( EDX ) /* save counter & pointer for */
100 MOVQ ( REGIND (EDX), MM0 ) /* x1 | x0 */
101 MOVD ( REGOFF (8, EDX), MM2 ) /* | x2 */
117 MOVQ ( REGIND (EDX), MM1 ) /* x1 | x0 */
121 MOVD ( REGOFF (8, EDX), MM2 ) /* | x2 */
127 ADD_L ( STRIDE, EDX ) /* next normal */
129 PREFETCH ( REGIND(EDX) )
136 POP_L ( EDX ) /* end of transform --- */
158 ADD_L ( STRIDE, EDX ) /* next normal */
[all …]
Dx86_cliptest.S44 #define MAT0 REGOFF(0, EDX)
45 #define MAT1 REGOFF(4, EDX)
46 #define MAT2 REGOFF(8, EDX)
47 #define MAT3 REGOFF(12, EDX)
136 MOV_L( ARG_CLIP, EDX )
152 ADD_L( EDX, ECX )
155 CMP_L( ECX, EDX )
210 MOV_B( CL, REGIND(EDX) )
244 INC_L( EDX )
248 CMP_L( EDX, ARG_CLIP )
[all …]
Dx86_xform2.S49 #define MAT0 REGOFF(0, EDX)
50 #define MAT1 REGOFF(4, EDX)
51 #define MAT2 REGOFF(8, EDX)
52 #define MAT3 REGOFF(12, EDX)
53 #define MAT4 REGOFF(16, EDX)
54 #define MAT5 REGOFF(20, EDX)
55 #define MAT6 REGOFF(24, EDX)
56 #define MAT7 REGOFF(28, EDX)
57 #define MAT8 REGOFF(32, EDX)
58 #define MAT9 REGOFF(36, EDX)
[all …]
Dx86_xform3.S49 #define MAT0 REGOFF(0, EDX)
50 #define MAT1 REGOFF(4, EDX)
51 #define MAT2 REGOFF(8, EDX)
52 #define MAT3 REGOFF(12, EDX)
53 #define MAT4 REGOFF(16, EDX)
54 #define MAT5 REGOFF(20, EDX)
55 #define MAT6 REGOFF(24, EDX)
56 #define MAT7 REGOFF(28, EDX)
57 #define MAT8 REGOFF(32, EDX)
58 #define MAT9 REGOFF(36, EDX)
[all …]
Dx86_xform4.S49 #define MAT0 REGOFF(0, EDX)
50 #define MAT1 REGOFF(4, EDX)
51 #define MAT2 REGOFF(8, EDX)
52 #define MAT3 REGOFF(12, EDX)
53 #define MAT4 REGOFF(16, EDX)
54 #define MAT5 REGOFF(20, EDX)
55 #define MAT6 REGOFF(24, EDX)
56 #define MAT7 REGOFF(28, EDX)
57 #define MAT8 REGOFF(32, EDX)
58 #define MAT9 REGOFF(36, EDX)
[all …]
Dsse_normal.S40 #define M(i) REGOFF(i * 4, EDX)
58 MOV_L ( ARG_MAT, EDX ) /* ptr to matrix */
59 MOV_L ( REGOFF(MATRIX_INV, EDX), EDX) /* matrix->inv */
120 MOV_L ( ARG_MAT, EDX ) /* ptr to matrix */
121 MOV_L ( REGOFF(MATRIX_INV, EDX), EDX) /* matrix->inv */
213 MOV_L ( ARG_MAT, EDX ) /* ptr to matrix */
214 MOV_L ( REGOFF(MATRIX_INV, EDX), EDX) /* matrix->inv */
Dsse_xform2.S42 #define M(i) REGOFF(i * 4, EDX)
57 MOV_L( ARG_MATRIX, EDX ) /* ptr to matrix */
141 MOV_L ( S(0), EDX )
142 MOV_L ( EDX, D(0) )
143 MOV_L ( S(1), EDX )
144 MOV_L ( EDX, D(1) )
171 MOV_L( ARG_MATRIX, EDX ) /* ptr to matrix */
232 MOV_L( ARG_MATRIX, EDX ) /* ptr to matrix */
291 MOV_L( ARG_MATRIX, EDX ) /* ptr to matrix */
354 MOV_L( ARG_MATRIX, EDX ) /* ptr to matrix */
[all …]
Dsse_xform3.S42 #define M(i) REGOFF(i * 4, EDX)
57 MOV_L( ARG_MATRIX, EDX ) /* ptr to matrix */
77 MOVAPS ( REGOFF(0, EDX), XMM0 ) /* m0 | m1 | m2 | m3 */
78 MOVAPS ( REGOFF(16, EDX), XMM1 ) /* m4 | m5 | m6 | m7 */
79 MOVAPS ( REGOFF(32, EDX), XMM2 ) /* m8 | m9 | m10 | m11 */
80 MOVAPS ( REGOFF(48, EDX), XMM3 ) /* m12 | m13 | m14 | m15 */
183 MOV_L( ARG_MATRIX, EDX ) /* ptr to matrix */
250 MOV_L( ARG_MATRIX, EDX ) /* ptr to matrix */
323 MOV_L( ARG_MATRIX, EDX ) /* ptr to matrix */
388 MOV_L( ARG_MATRIX, EDX ) /* ptr to matrix */
[all …]
Dsse_xform1.S42 #define M(i) REGOFF(i * 4, EDX)
57 MOV_L( ARG_MATRIX, EDX ) /* ptr to matrix */
137 MOV_L( S(0), EDX )
138 MOV_L( EDX, D(0) )
166 MOV_L( ARG_MATRIX, EDX ) /* ptr to matrix */
227 MOV_L( ARG_MATRIX, EDX ) /* ptr to matrix */
286 MOV_L( ARG_MATRIX, EDX ) /* ptr to matrix */
341 MOV_L( ARG_MATRIX, EDX ) /* ptr to matrix */
398 MOV_L( ARG_MATRIX, EDX ) /* ptr to matrix */
Dsse_xform4.S37 #define MAT(i) REGOFF(i * 4, EDX)
53 MOV_L( ARG_MATRIX, EDX )
125 MOV_L( ARG_MATRIX, EDX ) /* ptr to matrix */
197 MOV_L( ARG_MATRIX, EDX )
Dcommon_x86_asm.S90 MOV_L (EDX, REGIND(EDI))
146 MOV_L (EDX, EAX) /* return EDX */
/external/llvm/lib/Support/
DHost.cpp216 unsigned EAX = 0, EBX = 0, ECX = 0, EDX = 0; in getHostCPUName() local
217 if (GetX86CpuIDAndInfo(0x1, &EAX, &EBX, &ECX, &EDX)) in getHostCPUName()
231 bool HasMMX = (EDX >> 23) & 1; in getHostCPUName()
232 bool HasSSE = (EDX >> 25) & 1; in getHostCPUName()
233 bool HasSSE2 = (EDX >> 26) & 1; in getHostCPUName()
243 bool HasAVX = ((ECX & AVXBits) == AVXBits) && !GetX86XCR0(&EAX, &EDX) && in getHostCPUName()
247 !GetX86CpuIDAndInfoEx(0x7, 0x0, &EAX, &EBX, &ECX, &EDX); in getHostCPUName()
252 GetX86CpuIDAndInfo(0x80000001, &EAX, &EBX, &ECX, &EDX); in getHostCPUName()
253 bool Em64T = (EDX >> 29) & 0x1; in getHostCPUName()
745 unsigned EAX = 0, EBX = 0, ECX = 0, EDX = 0; in getHostCPUFeatures() local
[all …]
/external/lzma/C/
DCpuArch.c24 __asm mov EDX, EAX; in CheckFlag() local
30 __asm xor EAX, EDX; in CheckFlag() local
31 __asm push EDX; in CheckFlag() local
66 __asm xor EDX, EDX; in MyCPUID() local
72 __asm mov d2, EDX; in MyCPUID() local
/external/llvm/test/CodeGen/X86/
Dhandle-move.ll8 ; %EDX has a live range into the function and is used by the DIV32r.
11 …4B -> 180B: DIV32r %vreg4, %EAX<imp-def>, %EDX<imp-def,dead>, %EFLAGS<imp-def,dead>, %EAX<imp-use,…
28 … -> 180B: DIV32r %vreg4, %EAX<imp-def,dead>, %EDX<imp-def>, %EFLAGS<imp-def,dead>, %EAX<imp-use,ki…
62 ; handleMove 208B -> 36B: %EDX<def> = MOV32r0 %EFLAGS<imp-def,dead>
Dinline-asm-tied.ll4 ; CHECK: movl [[EDX:%e..]], 4(%esp)
5 ; CHECK: movl [[EDX]], 4(%esp)
Dabi-isel.ll1684 ; DARWIN-32-DYNAMIC-NEXT: movl L_dst$non_lazy_ptr, [[EDX:%e.x]]
1685 ; DARWIN-32-DYNAMIC-NEXT: movl [[ECX]], ([[EDX]],[[EAX]],4)
1693 ; DARWIN-32-PIC-NEXT: movl L_src$non_lazy_ptr-L24$pb([[EAX]]), [[EDX:%e.x]]
1694 ; DARWIN-32-PIC-NEXT: movl ([[EDX]],[[ECX]],4), [[EDX:%e.x]]
1696 ; DARWIN-32-PIC-NEXT: movl [[EDX]], ([[EAX]],[[ECX]],4)
1762 ; DARWIN-32-DYNAMIC-NEXT: movl L_xdst$non_lazy_ptr, [[EDX:%e.x]]
1763 ; DARWIN-32-DYNAMIC-NEXT: movl [[ECX]], ([[EDX]],[[EAX]],4)
1771 ; DARWIN-32-PIC-NEXT: movl L_xsrc$non_lazy_ptr-L25$pb([[EAX]]), [[EDX:%e.x]]
1772 ; DARWIN-32-PIC-NEXT: movl ([[EDX]],[[ECX]],4), [[EDX:%e.x]]
1774 ; DARWIN-32-PIC-NEXT: movl [[EDX]], ([[EAX]],[[ECX]],4)
[all …]
D2008-09-17-inline-asm-1.ll4 ; %0 must not be put in EAX or EDX.
10 ; In the second asm, $0 and $2 must not be put in EDX.
/external/llvm/lib/Target/X86/
DX86InstrSystem.td435 let Uses = [EAX, ECX, EDX] in
437 let Defs = [EAX, EDX], Uses = [ECX] in
461 let Defs = [EAX, EBX, ECX, EDX], Uses = [EAX, ECX] in
476 let Defs = [EDX, EAX], Uses = [ECX] in
479 let Uses = [EDX, EAX, ECX] in
483 let Uses = [EDX, EAX] in {
487 [(int_x86_xsave addr:$dst, EDX, EAX)]>, TB;
490 [(int_x86_xsave64 addr:$dst, EDX, EAX)]>, TB, Requires<[In64BitMode]>;
493 [(int_x86_xrstor addr:$dst, EDX, EAX)]>, TB;
496 [(int_x86_xrstor64 addr:$dst, EDX, EAX)]>, TB, Requires<[In64BitMode]>;
[all …]
DX86CallingConv.td40 CCIfType<[i32], CCAssignToReg<[EAX, EDX, ECX]>>,
104 CCIfType<[i32], CCAssignToReg<[EAX, EDX, ECX]>>,
135 CCIfType<[i32], CCAssignToReg<[ESI, EBP, EAX, EDX]>>
277 CCIfType<[i32], CCAssignToReg<[EDI, ESI, EDX, ECX, R8D, R9D]>>,
378 CCIfType<[i32], CCAssignToRegWithShadow<[ECX , EDX , R8D , R9D ],
589 CCIfNotVarArg<CCIfInReg<CCIfType<[i32], CCAssignToReg<[EAX, EDX, ECX]>>>>,
602 // The first 2 integer arguments are passed in ECX/EDX
603 CCIfInReg<CCIfType<[i32], CCAssignToReg<[ECX, EDX]>>>,
675 // The first 2 integer arguments are passed in ECX/EDX
676 CCIfType<[i32], CCAssignToReg<[ECX, EDX]>>,
[all …]
DX86InstrArithmetic.td72 // EAX,EDX = EAX*GR32
73 let Defs = [EAX,EDX,EFLAGS], Uses = [EAX], hasSideEffects = 0 in
76 [/*(set EAX, EDX, EFLAGS, (X86umul_flag EAX, GR32:$src))*/],
99 // EAX,EDX = EAX*[mem32]
100 let Defs = [EAX,EDX,EFLAGS], Uses = [EAX] in
119 // EAX,EDX = EAX*GR32
120 let Defs = [EAX,EDX,EFLAGS], Uses = [EAX] in
138 // EAX,EDX = EAX*[mem32]
139 let Defs = [EAX,EDX,EFLAGS], Uses = [EAX] in
303 let Defs = [EAX,EDX,EFLAGS], Uses = [EAX,EDX] in
[all …]
/external/strace/linux/i386/
Duserent.h3 XLAT(4*EDX),

1234