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Searched refs:EXTRACT_SUBREG (Results 1 – 25 of 51) sorted by relevance

123

/external/llvm/lib/Target/Hexagon/
DHexagonIntrinsicsDerived.td20 (EXTRACT_SUBREG
22 (M2_dpmpyuu_s0 (i32 (EXTRACT_SUBREG (i64 DoubleRegs:$src1),
24 (i32 (EXTRACT_SUBREG (i64 DoubleRegs:$src2),
27 (i32 (EXTRACT_SUBREG (i64 DoubleRegs:$src1), subreg_loreg)),
28 (i32 (EXTRACT_SUBREG (i64 DoubleRegs:$src2), subreg_hireg))),
29 (i32 (EXTRACT_SUBREG (i64 DoubleRegs:$src2), subreg_loreg)),
30 (i32 (EXTRACT_SUBREG (i64 DoubleRegs:$src1), subreg_hireg))),
32 (EXTRACT_SUBREG
35 (i32 (EXTRACT_SUBREG (i64 DoubleRegs:$src1), subreg_loreg)),
36 (i32 (EXTRACT_SUBREG (i64 DoubleRegs:$src2),
DHexagonSelectCCInfo.td104 (EXTRACT_SUBREG DoubleRegs:$tval, subreg_hireg),
105 (EXTRACT_SUBREG DoubleRegs:$fval, subreg_hireg)),
107 (EXTRACT_SUBREG DoubleRegs:$tval, subreg_loreg),
108 (EXTRACT_SUBREG DoubleRegs:$fval, subreg_loreg)))>;
116 (EXTRACT_SUBREG DoubleRegs:$tval, subreg_hireg),
117 (EXTRACT_SUBREG DoubleRegs:$fval, subreg_hireg)),
120 (EXTRACT_SUBREG DoubleRegs:$tval, subreg_loreg),
121 (EXTRACT_SUBREG DoubleRegs:$fval, subreg_loreg)))>;
DHexagonMachineScheduler.cpp53 case TargetOpcode::EXTRACT_SUBREG: in isResourceAvailable()
105 case TargetOpcode::EXTRACT_SUBREG: in reserveResources()
DHexagonIntrinsicsV60.td64 (v16i32 (EXTRACT_SUBREG (v32i32 VecDblRegs:$src1), subreg_loreg)) >,
68 (v16i32 (EXTRACT_SUBREG (v32i32 VecDblRegs:$src1), subreg_hireg)) >,
72 (v32i32 (EXTRACT_SUBREG (v64i32 VecDblRegs128B:$src1),
77 (v32i32 (EXTRACT_SUBREG (v64i32 VecDblRegs128B:$src1),
/external/llvm/lib/Target/PowerPC/
DPPCInstrVSX.td839 (f64 (EXTRACT_SUBREG $S, sub_64))>;
841 (f64 (EXTRACT_SUBREG (XXPERMDI $S, $S, 2), sub_64))>;
850 (f64 (EXTRACT_SUBREG (XXPERMDI $S, $S, 2), sub_64))>;
852 (f64 (EXTRACT_SUBREG $S, sub_64))>;
1280 (EXTRACT_SUBREG
1284 (EXTRACT_SUBREG
1288 dag LE_WORD_0 = (MFVSRWZ (EXTRACT_SUBREG (XXSLDWI $S, $S, 2), sub_64));
1289 dag LE_WORD_1 = (MFVSRWZ (EXTRACT_SUBREG (XXSLDWI $S, $S, 1), sub_64));
1290 dag LE_WORD_2 = (MFVSRWZ (EXTRACT_SUBREG
1292 dag LE_WORD_3 = (MFVSRWZ (EXTRACT_SUBREG (XXSLDWI $S, $S, 3), sub_64));
[all …]
DPPCInstrInfo.td2967 (EXTRACT_SUBREG (rfrag8 $s1), sub_32)>;
2976 (EXTRACT_SUBREG (rfrag8 $s1), sub_32)>;
3065 (EXTRACT_SUBREG (CMPLWI $s1, imm:$imm), sub_lt)>;
3067 (EXTRACT_SUBREG (CMPWI $s1, imm:$imm), sub_lt)>;
3069 (EXTRACT_SUBREG (CMPLWI $s1, imm:$imm), sub_gt)>;
3071 (EXTRACT_SUBREG (CMPWI $s1, imm:$imm), sub_gt)>;
3073 (EXTRACT_SUBREG (CMPWI $s1, imm:$imm), sub_eq)>;
3075 (EXTRACT_SUBREG (CMPLWI $s1, imm:$imm), sub_eq)>;
3089 (EXTRACT_SUBREG (CMPLWI (XORIS $s1, (HI16 imm:$imm)),
3093 (EXTRACT_SUBREG (CMPLWI $s1, imm:$imm), sub_lt)>;
[all …]
DPPCInstrQPX.td843 (EXTRACT_SUBREG $S, sub_64)>;
845 (EXTRACT_SUBREG $S, sub_64)>;
848 (EXTRACT_SUBREG (QVESPLATI $S, 1), sub_64)>;
850 (EXTRACT_SUBREG (QVESPLATI $S, 2), sub_64)>;
852 (EXTRACT_SUBREG (QVESPLATI $S, 3), sub_64)>;
855 (EXTRACT_SUBREG (QVESPLATIs $S, 1), sub_64)>;
857 (EXTRACT_SUBREG (QVESPLATIs $S, 2), sub_64)>;
859 (EXTRACT_SUBREG (QVESPLATIs $S, 3), sub_64)>;
862 (EXTRACT_SUBREG (QVFPERM $S, $S,
867 (EXTRACT_SUBREG (QVFPERMs $S, $S,
DPPCInstrHTM.td98 (EXTRACT_SUBREG (
/external/llvm/lib/Target/X86/
DX86InstrCompiler.td259 def : Pat<(i8 0), (EXTRACT_SUBREG (MOV32r0), sub_8bit)>;
260 def : Pat<(i16 0), (EXTRACT_SUBREG (MOV32r0), sub_16bit)>;
277 def : Pat<(i16 1), (EXTRACT_SUBREG (MOV32r1), sub_16bit)>;
278 def : Pat<(i16 -1), (EXTRACT_SUBREG (MOV32r_1), sub_16bit)>;
1186 def : Pat<(i16 (anyext GR8 :$src)), (EXTRACT_SUBREG
1203 // register. Truncate can be lowered to EXTRACT_SUBREG. CopyFromReg may
1209 N->getOpcode() != TargetOpcode::EXTRACT_SUBREG &&
1336 (EXTRACT_SUBREG GR64:$src, sub_32bit),
1344 (EXTRACT_SUBREG GR64:$src, sub_32bit),
1356 (MOVZX32rr16 (EXTRACT_SUBREG GR32:$src1, sub_16bit))>;
[all …]
DX86InstrAVX512.td632 (To.VT (EXTRACT_SUBREG (From.VT From.RC:$src), To.SubRegIdx))>;
971 (EXTRACT_SUBREG (SrcInfo.VT SrcInfo.RC:$src), sub_xmm))>;
1107 (VBROADCASTSSZr (EXTRACT_SUBREG (v16f32 VR512:$src), sub_xmm))>;
1109 (VBROADCASTSSZr (EXTRACT_SUBREG (v8f32 VR256X:$src), sub_xmm))>;
1112 (VBROADCASTSDZr (EXTRACT_SUBREG (v8f64 VR512:$src), sub_xmm))>;
1114 (VBROADCASTSDZr (EXTRACT_SUBREG (v4f64 VR256X:$src), sub_xmm))>;
1403 (EXTRACT_SUBREG
1410 (EXTRACT_SUBREG
2084 (EXTRACT_SUBREG (KMOVBrk VK8:$src), sub_8bit)>;
2090 (EXTRACT_SUBREG (KMOVWrk VK16:$src), sub_16bit)>;
[all …]
/external/llvm/lib/Target/AArch64/
DAArch64InstrAtomics.td292 (STXRB (EXTRACT_SUBREG GPR64:$val, sub_32), GPR64sp:$addr)>;
294 (STXRH (EXTRACT_SUBREG GPR64:$val, sub_32), GPR64sp:$addr)>;
296 (STXRW (EXTRACT_SUBREG GPR64:$val, sub_32), GPR64sp:$addr)>;
308 (STXRB (EXTRACT_SUBREG GPR64:$val, sub_32), GPR64sp:$addr)>;
310 (STXRH (EXTRACT_SUBREG GPR64:$val, sub_32), GPR64sp:$addr)>;
312 (STXRW (EXTRACT_SUBREG GPR64:$val, sub_32), GPR64sp:$addr)>;
338 (STLXRB (EXTRACT_SUBREG GPR64:$val, sub_32), GPR64sp:$addr)>;
340 (STLXRH (EXTRACT_SUBREG GPR64:$val, sub_32), GPR64sp:$addr)>;
342 (STLXRW (EXTRACT_SUBREG GPR64:$val, sub_32), GPR64sp:$addr)>;
354 (STLXRB (EXTRACT_SUBREG GPR64:$val, sub_32), GPR64sp:$addr)>;
[all …]
DAArch64InstrInfo.td1962 (STRW (EXTRACT_SUBREG GPR64:$Rt, sub_32),
1967 (STRX (EXTRACT_SUBREG GPR64:$Rt, sub_32),
2024 (STRW (EXTRACT_SUBREG VecListOne128:$Vt, SubRegIdx),
2029 (STRX (EXTRACT_SUBREG VecListOne128:$Vt, SubRegIdx),
2133 (STRWui (EXTRACT_SUBREG GPR64:$Rt, sub_32), GPR64sp:$Rn, uimm12s4:$offset)>;
2136 (STRHHui (EXTRACT_SUBREG GPR64:$Rt, sub_32), GPR64sp:$Rn, uimm12s2:$offset)>;
2138 (STRBBui (EXTRACT_SUBREG GPR64:$Rt, sub_32), GPR64sp:$Rn, uimm12s1:$offset)>;
2227 (STURWi (EXTRACT_SUBREG GPR64:$Rt, sub_32), GPR64sp:$Rn, simm9:$offset)>;
2229 (STURHHi (EXTRACT_SUBREG GPR64:$Rt, sub_32), GPR64sp:$Rn, simm9:$offset)>;
2231 (STURBBi (EXTRACT_SUBREG GPR64:$Rt, sub_32), GPR64sp:$Rn, simm9:$offset)>;
[all …]
/external/llvm/lib/Target/SystemZ/
DSystemZPatterns.td16 (insn (EXTRACT_SUBREG GR64:$src, subreg_l32))>;
27 (insn cls:$src1, (EXTRACT_SUBREG GR64:$src2, subreg_l32))>;
36 (insn cls:$src1, (EXTRACT_SUBREG GR64:$src2, subreg_l32))>;
74 (insn (EXTRACT_SUBREG GR64:$R1, subreg_l32), mode:$XBD2)>;
89 (insn (EXTRACT_SUBREG GR64:$R1, subreg_l32), pcrel32:$XBD2)> {
106 (insn (EXTRACT_SUBREG GR64:$new, subreg_l32), mode:$addr,
111 (insninv (EXTRACT_SUBREG GR64:$new, subreg_l32), mode:$addr,
DSystemZInstrFP.td83 (CPSDRsd FP32:$src1, (EXTRACT_SUBREG FP128:$src2, subreg_h64))>;
92 (CPSDRdd FP64:$src1, (EXTRACT_SUBREG FP128:$src2, subreg_h64))>;
100 def : CopySign128<FP32, (CPSDRds (EXTRACT_SUBREG FP128:$src1, subreg_h64),
102 def : CopySign128<FP64, (CPSDRdd (EXTRACT_SUBREG FP128:$src1, subreg_h64),
104 def : CopySign128<FP128, (CPSDRdd (EXTRACT_SUBREG FP128:$src1, subreg_h64),
105 (EXTRACT_SUBREG FP128:$src2, subreg_h64))>;
165 (EXTRACT_SUBREG (LEXBR FP128:$src), subreg_hr32)>;
167 (EXTRACT_SUBREG (LDXBR FP128:$src), subreg_h64)>;
DSystemZInstrVector.td46 (EXTRACT_SUBREG (insn VR128:$vec, shift12only:$index), subreg_l32)>;
990 (EXTRACT_SUBREG (LFER VR32:$src), subreg_l32)>;
1024 (EXTRACT_SUBREG VR128:$vec, subreg_r32)>;
1026 (EXTRACT_SUBREG (VREPF VR128:$vec, imm32zx2:$index), subreg_r32)>;
1029 (EXTRACT_SUBREG VR128:$vec, subreg_r64)>;
1031 (EXTRACT_SUBREG (VREPG VR128:$vec, imm32zx1:$index), subreg_r64)>;
/external/llvm/include/llvm/Target/
DTargetOpcodes.h41 EXTRACT_SUBREG = 6, enumerator
/external/llvm/lib/Target/ARM/
DARMInstrNEON.td4202 (v4i16 (EXTRACT_SUBREG QPR:$src2,
4208 (v2i32 (EXTRACT_SUBREG QPR:$src2,
4214 (v2f32 (EXTRACT_SUBREG QPR:$src2,
4240 (v4i16 (EXTRACT_SUBREG QPR:$src2,
4247 (v2i32 (EXTRACT_SUBREG QPR:$src2,
4262 (v4i16 (EXTRACT_SUBREG QPR:$src2,
4269 (v2i32 (EXTRACT_SUBREG QPR:$src2,
4331 (v4i16 (EXTRACT_SUBREG QPR:$src3,
4339 (v2i32 (EXTRACT_SUBREG QPR:$src3,
4348 (v2f32 (EXTRACT_SUBREG QPR:$src3,
[all …]
/external/llvm/lib/Target/Mips/
DMips64InstrInfo.td504 (EXTRACT_SUBREG GPR64:$src, sub_32)>;
506 (EXTRACT_SUBREG GPR64:$src, sub_32)>;
508 (SLL (EXTRACT_SUBREG GPR64:$src, sub_32), 0)>;
512 (DSLLV GPR64:$rt, (EXTRACT_SUBREG GPR64:$rs, sub_32))>;
514 (DSRLV GPR64:$rt, (EXTRACT_SUBREG GPR64:$rs, sub_32))>;
516 (DSRAV GPR64:$rt, (EXTRACT_SUBREG GPR64:$rs, sub_32))>;
518 (DROTRV GPR64:$rt, (EXTRACT_SUBREG GPR64:$rs, sub_32))>;
DMipsMSAInstrInfo.td3762 (SRA (COPY_TO_REGCLASS (i32 (EXTRACT_SUBREG (SPLAT_B v16i8:$ws,
3767 (SRA (COPY_TO_REGCLASS (i32 (EXTRACT_SUBREG (SPLAT_H v8i16:$ws,
3772 (COPY_TO_REGCLASS (i32 (EXTRACT_SUBREG (SPLAT_W v4i32:$ws,
3777 (COPY_TO_REGCLASS (i64 (EXTRACT_SUBREG (SPLAT_D v2i64:$ws,
3783 (SRL (COPY_TO_REGCLASS (i32 (EXTRACT_SUBREG (SPLAT_B v16i8:$ws,
3788 (SRL (COPY_TO_REGCLASS (i32 (EXTRACT_SUBREG (SPLAT_H v8i16:$ws,
3793 (COPY_TO_REGCLASS (i32 (EXTRACT_SUBREG (SPLAT_W v4i32:$ws,
3798 (COPY_TO_REGCLASS (i64 (EXTRACT_SUBREG (SPLAT_D v2i64:$ws,
3804 (f32 (EXTRACT_SUBREG (SPLAT_W v4f32:$ws,
3808 (f64 (EXTRACT_SUBREG (SPLAT_D v2f64:$ws,
[all …]
/external/llvm/lib/Target/AMDGPU/
DSIInstructions.td2627 (i32 (EXTRACT_SUBREG f64:$src, sub0)),
2629 (V_OR_B32_e32 (EXTRACT_SUBREG f64:$src, sub1),
2647 (i32 (EXTRACT_SUBREG f64:$src, sub0)),
2649 (V_AND_B32_e32 (EXTRACT_SUBREG f64:$src, sub1),
2657 (i32 (EXTRACT_SUBREG f64:$src, sub0)),
2659 (V_XOR_B32_e32 (EXTRACT_SUBREG f64:$src, sub1),
2721 (V_CUBETC_F32 0 /* src0_modifiers */, (EXTRACT_SUBREG $src, sub0),
2722 0 /* src1_modifiers */, (EXTRACT_SUBREG $src, sub1),
2723 0 /* src2_modifiers */, (EXTRACT_SUBREG $src, sub2),
2725 (V_CUBESC_F32 0 /* src0_modifiers */, (EXTRACT_SUBREG $src, sub0),
[all …]
DAMDGPUInstructions.td518 (EXTRACT_SUBREG $src, sub_reg)
571 (i32 (EXTRACT_SUBREG $src0, sub0)), sub0,
573 (i32 (EXTRACT_SUBREG $src0, sub1)),
574 (i32 (EXTRACT_SUBREG $src1, sub1))), sub1)
DAMDGPUISelDAGToDAG.cpp718 SDNode *Lo0 = CurDAG->getMachineNode(TargetOpcode::EXTRACT_SUBREG, in SelectADD_SUB_I64()
720 SDNode *Hi0 = CurDAG->getMachineNode(TargetOpcode::EXTRACT_SUBREG, in SelectADD_SUB_I64()
723 SDNode *Lo1 = CurDAG->getMachineNode(TargetOpcode::EXTRACT_SUBREG, in SelectADD_SUB_I64()
725 SDNode *Hi1 = CurDAG->getMachineNode(TargetOpcode::EXTRACT_SUBREG, in SelectADD_SUB_I64()
1239 TargetOpcode::EXTRACT_SUBREG, in SelectAddrSpaceCast()
/external/llvm/lib/CodeGen/
DExpandPostRAPseudos.cpp220 case TargetOpcode::EXTRACT_SUBREG: in runOnMachineFunction()
/external/llvm/lib/CodeGen/SelectionDAG/
DResourcePriorityQueue.cpp263 case TargetOpcode::EXTRACT_SUBREG: in isResourceAvailable()
303 case TargetOpcode::EXTRACT_SUBREG: in reserveResources()
/external/mesa3d/src/gallium/drivers/radeon/
DAMDGPUInstructions.td136 (EXTRACT_SUBREG vec_class:$src, sub_reg)

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