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Searched refs:FMINNAN (Results 1 – 12 of 12) sorted by relevance

/external/llvm/include/llvm/CodeGen/
DISDOpcodes.h526 FMINNAN, FMAXNAN, enumerator
DSelectionDAG.h1102 case ISD::FMINNAN:
/external/llvm/lib/CodeGen/SelectionDAG/
DSelectionDAGDumper.cpp155 case ISD::FMINNAN: return "fminnan"; in getOperationName()
DLegalizeVectorOps.cpp304 case ISD::FMINNAN: in LegalizeOp()
DLegalizeVectorTypes.cpp112 case ISD::FMINNAN: in ScalarizeVectorResult()
672 case ISD::FMINNAN: in SplitVectorResult()
2036 case ISD::FMINNAN: in WidenVectorResult()
DSelectionDAGBuilder.cpp2480 case SPNB_RETURNS_NAN: Opc = ISD::FMINNAN; break; in visitSelect()
2485 else if (TLI.isOperationLegalOrCustom(ISD::FMINNAN, VT)) in visitSelect()
2486 Opc = ISD::FMINNAN; in visitSelect()
2489 ISD::FMINNUM : ISD::FMINNAN; in visitSelect()
DLegalizeFloatTypes.cpp1872 case ISD::FMINNAN: in PromoteFloatResult()
/external/llvm/lib/Target/WebAssembly/
DWebAssemblyISelLowering.cpp144 setOperationAction(ISD::FMINNAN, T, Legal); in WebAssemblyTargetLowering()
/external/llvm/lib/CodeGen/
DTargetLoweringBase.cpp790 setOperationAction(ISD::FMINNAN, VT, Expand); in initActions()
/external/llvm/include/llvm/Target/
DTargetSelectionDAG.td426 def fminnan : SDNode<"ISD::FMINNAN" , SDTFPBinOp>;
/external/llvm/lib/Target/AArch64/
DAArch64ISelLowering.cpp307 setOperationAction(ISD::FMINNAN, MVT::f16, Promote); in AArch64TargetLowering()
399 setOperationAction(ISD::FMINNAN, Ty, Legal); in AArch64TargetLowering()
702 for (unsigned Opcode : {ISD::FMINNAN, ISD::FMAXNAN, in addTypeForNEON()
8405 return DAG.getNode(ISD::FMINNAN, SDLoc(N), N->getValueType(0), in performIntrinsicCombine()
/external/llvm/lib/Target/ARM/
DARMISelLowering.cpp1001 setOperationAction(ISD::FMINNAN, MVT::f32, Legal); in ARMTargetLowering()
1003 setOperationAction(ISD::FMINNAN, MVT::v2f32, Legal); in ARMTargetLowering()
1005 setOperationAction(ISD::FMINNAN, MVT::v4f32, Legal); in ARMTargetLowering()
2856 ? ISD::FMINNAN : ISD::FMAXNAN; in LowerINTRINSIC_WO_CHAIN()