/external/llvm/lib/Target/ARM/ |
D | ARMBaseInstrInfo.h | 121 CreateTargetPostRAHazardRecognizer(const InstrItineraryData *II, 281 unsigned getNumMicroOps(const InstrItineraryData *ItinData, 284 int getOperandLatency(const InstrItineraryData *ItinData, 288 int getOperandLatency(const InstrItineraryData *ItinData, 308 int getVLDMDefCycle(const InstrItineraryData *ItinData, 312 int getLDMDefCycle(const InstrItineraryData *ItinData, 316 int getVSTMUseCycle(const InstrItineraryData *ItinData, 320 int getSTMUseCycle(const InstrItineraryData *ItinData, 324 int getOperandLatency(const InstrItineraryData *ItinData, 332 unsigned getInstrLatency(const InstrItineraryData *ItinData, [all …]
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D | ARMHazardRecognizer.h | 35 ARMHazardRecognizer(const InstrItineraryData *ItinData, in ARMHazardRecognizer()
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D | ARMSubtarget.h | 250 InstrItineraryData InstrItins; 473 const InstrItineraryData *getInstrItineraryData() const override { in getInstrItineraryData()
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/external/llvm/include/llvm/CodeGen/ |
D | DFAPacketizer.h | 39 class InstrItineraryData; variable 75 const InstrItineraryData *InstrItins; 87 DFAPacketizer(const InstrItineraryData *I, const DFAStateInput (*SIT)[2], 117 const InstrItineraryData *getInstrItins() const { return InstrItins; } in getInstrItins()
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D | ScoreboardHazardRecognizer.h | 26 class InstrItineraryData; variable 93 const InstrItineraryData *ItinData; 107 ScoreboardHazardRecognizer(const InstrItineraryData *ItinData,
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D | TargetSchedule.h | 36 InstrItineraryData InstrItins; 78 const InstrItineraryData *getInstrItineraries() const { in getInstrItineraries()
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D | ResourcePriorityQueue.h | 63 const InstrItineraryData* InstrItins;
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/external/llvm/lib/MC/ |
D | MCSubtargetInfo.cpp | 101 InstrItineraryData 104 return InstrItineraryData(SchedModel, Stages, OperandCycles, ForwardingPaths); in getInstrItineraryForCPU() 108 void MCSubtargetInfo::initInstrItins(InstrItineraryData &InstrItins) const { in initInstrItins() 109 InstrItins = InstrItineraryData(getSchedModel(), Stages, OperandCycles, in initInstrItins()
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/external/llvm/include/llvm/Target/ |
D | TargetInstrInfo.h | 27 class InstrItineraryData; variable 1078 CreateTargetMIHazardRecognizer(const InstrItineraryData*, 1084 CreateTargetPostRAHazardRecognizer(const InstrItineraryData*, 1141 virtual unsigned getNumMicroOps(const InstrItineraryData *ItinData, 1152 virtual int getOperandLatency(const InstrItineraryData *ItinData, 1164 virtual int getOperandLatency(const InstrItineraryData *ItinData, 1171 unsigned computeOperandLatency(const InstrItineraryData *ItinData, 1179 virtual unsigned getInstrLatency(const InstrItineraryData *ItinData, 1185 virtual int getInstrLatency(const InstrItineraryData *ItinData, 1192 int computeDefOperandLatency(const InstrItineraryData *ItinData,
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/external/llvm/include/llvm/MC/ |
D | MCInstrItineraries.h | 109 class InstrItineraryData { 118 InstrItineraryData() : SchedModel(MCSchedModel::GetDefaultSchedModel()), in InstrItineraryData() function 122 InstrItineraryData(const MCSchedModel &SM, const InstrStage *S, in InstrItineraryData() function
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D | MCSubtargetInfo.h | 156 InstrItineraryData getInstrItineraryForCPU(StringRef CPU) const; 159 void initInstrItins(InstrItineraryData &InstrItins) const;
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D | MCSchedule.h | 197 friend class InstrItineraryData; member
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/external/llvm/lib/Target/PowerPC/ |
D | PPCInstrInfo.h | 112 CreateTargetPostRAHazardRecognizer(const InstrItineraryData *II, 115 unsigned getInstrLatency(const InstrItineraryData *ItinData, 119 int getOperandLatency(const InstrItineraryData *ItinData, 123 int getOperandLatency(const InstrItineraryData *ItinData, in getOperandLatency()
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D | PPCSubtarget.h | 76 InstrItineraryData InstrItins; 159 const InstrItineraryData *getInstrItineraryData() const override { in getInstrItineraryData()
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D | PPCHazardRecognizers.h | 35 PPCDispatchGroupSBHazardRecognizer(const InstrItineraryData *ItinData, in PPCDispatchGroupSBHazardRecognizer()
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/external/mesa3d/src/gallium/drivers/radeon/ |
D | AMDGPUSubtarget.h | 40 InstrItineraryData InstrItins; 46 const InstrItineraryData &getInstrItineraryData() const { return InstrItins; } in getInstrItineraryData()
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D | AMDGPUTargetMachine.h | 37 const InstrItineraryData* InstrItins; 61 virtual const InstrItineraryData* getInstrItineraryData() const { in getInstrItineraryData()
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D | R600InstrInfo.h | 106 int getInstrLatency(const InstrItineraryData *ItinData, 110 virtual int getInstrLatency(const InstrItineraryData *ItinData, in getInstrLatency()
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/external/llvm/lib/Target/Hexagon/ |
D | HexagonSubtarget.h | 56 InstrItineraryData InstrItins; 65 const InstrItineraryData *getInstrItineraryData() const override { in getInstrItineraryData()
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D | HexagonInstrInfo.h | 223 CreateTargetPostRAHazardRecognizer(const InstrItineraryData*, 237 unsigned getInstrLatency(const InstrItineraryData *ItinData, 367 unsigned getInstrTimingClassLatency(const InstrItineraryData *ItinData,
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/external/llvm/lib/CodeGen/ |
D | TargetInstrInfo.cpp | 963 CreateTargetMIHazardRecognizer(const InstrItineraryData *II, in CreateTargetMIHazardRecognizer() 971 CreateTargetPostRAHazardRecognizer(const InstrItineraryData *II, in CreateTargetPostRAHazardRecognizer() 982 TargetInstrInfo::getOperandLatency(const InstrItineraryData *ItinData, in getOperandLatency() 998 int TargetInstrInfo::getInstrLatency(const InstrItineraryData *ItinData, in getInstrLatency() 1014 TargetInstrInfo::getNumMicroOps(const InstrItineraryData *ItinData, in getNumMicroOps() 1046 getInstrLatency(const InstrItineraryData *ItinData, in getInstrLatency() 1060 const InstrItineraryData *ItinData = SchedModel.getInstrItineraries(); in hasLowDefLatency() 1072 getOperandLatency(const InstrItineraryData *ItinData, in getOperandLatency() 1083 const InstrItineraryData *ItinData, in computeDefOperandLatency() 1109 computeOperandLatency(const InstrItineraryData *ItinData, in computeOperandLatency()
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/external/llvm/lib/Target/AMDGPU/ |
D | AMDGPUSubtarget.h | 95 InstrItineraryData InstrItins; 116 const InstrItineraryData *getInstrItineraryData() const override { in getInstrItineraryData()
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D | R600InstrInfo.h | 204 unsigned int getInstrLatency(const InstrItineraryData *ItinData, 208 int getInstrLatency(const InstrItineraryData *ItinData, in getInstrLatency()
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/external/llvm/lib/Target/Mips/ |
D | MipsSubtarget.h | 145 InstrItineraryData InstrItins; 306 const InstrItineraryData *getInstrItineraryData() const override { in getInstrItineraryData()
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/external/llvm/lib/Target/X86/ |
D | X86Subtarget.h | 247 InstrItineraryData InstrItins; 535 const InstrItineraryData *getInstrItineraryData() const override { in getInstrItineraryData()
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