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Searched refs:LOAD (Results 1 – 25 of 105) sorted by relevance

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/external/llvm/test/CodeGen/ARM/
Dvector-promotion.ll6 ; IR-BOTH: [[LOAD:%[a-zA-Z_0-9-]+]] = load <2 x i32>, <2 x i32>* %addr1
7 ; IR-BOTH-NEXT: [[VECTOR_OR:%[a-zA-Z_0-9-]+]] = or <2 x i32> [[LOAD]], <i32 undef, i32 1>
14 ; ASM: vldr [[LOAD:d[0-9]+]], [r0]
15 ; ASM-NEXT: vorr.i32 [[LOAD]], #0x1
16 ; ASM-NEXT: vst1.32 {[[LOAD]][1]}, [r1:32]
27 ; IR-BOTH: [[LOAD:%[a-zA-Z_0-9-]+]] = load <2 x i32>, <2 x i32>* %addr1
28 ; IR-BOTH-NEXT: [[EXTRACT:%[a-zA-Z_0-9-]+]] = extractelement <2 x i32> [[LOAD]], i32 0
34 ; ASM: vldr [[LOAD:d[0-9]+]], [r0]
35 ; ASM: vmov.32 {{r[0-9]+}}, [[LOAD]]
47 ; IR-BOTH: [[LOAD:%[a-zA-Z_0-9-]+]] = load <2 x i32>, <2 x i32>* %addr1
[all …]
D2012-08-09-neon-extload.ll21 ; CHECK: vld1.16 {d[[LOAD:[0-9]+]][0]}, [{{r[0-9]+}}:16]
22 ; CHECK: vmovl.s8 {{q[0-9]+}}, d[[LOAD]]
36 ; CHECK: vmovl.s8 {{q[0-9]+}}, d[[LOAD]]
53 ; CHECK: vld1.32 {d[[LOAD:[0-9]+]][0]}, [{{r[0-9]+}}:32]
54 ; CHECK: vmovl.s8 {{q[0-9]+}}, d[[LOAD]]
68 ; CHECK: vld1.32 {d[[LOAD:[0-9]+]][0]}, [{{r[0-9]+}}:32]
69 ; CHECK: vmovl.s8 {{q[0-9]+}}, d[[LOAD]]
82 ; CHECK: vld1.32 {d[[LOAD:[0-9]+]][0]}, [{{r[0-9]+}}:32]
83 ; CHECK: vmovl.s16 {{q[0-9]+}}, d[[LOAD]]
97 ; CHECK: vld1.32 {d[[LOAD:[0-9]+]][0]}, [{{r[0-9]+}}:32]
[all …]
/external/valgrind/memcheck/tests/
Dcond_ld.stderr.exp-arm3 LOAD CASE 0
8 LOAD CASE 1
13 LOAD CASE 2
18 LOAD CASE 3
23 LOAD CASE 4
40 LOAD CASE 5
57 LOAD CASE 6
74 LOAD CASE 7
91 LOAD CASE 8
102 LOAD CASE 9
[all …]
Dcond_ld.stderr.exp-32bit-non-arm3 LOAD CASE 0
8 LOAD CASE 1
13 LOAD CASE 2
18 LOAD CASE 3
23 LOAD CASE 4
40 LOAD CASE 5
57 LOAD CASE 6
74 LOAD CASE 7
91 LOAD CASE 8
102 LOAD CASE 9
[all …]
Dcond_ld.stderr.exp-64bit-non-arm3 LOAD CASE 0
8 LOAD CASE 1
13 LOAD CASE 2
18 LOAD CASE 3
23 LOAD CASE 4
40 LOAD CASE 5
57 LOAD CASE 6
74 LOAD CASE 7
91 LOAD CASE 8
102 LOAD CASE 9
[all …]
/external/llvm/test/CodeGen/AMDGPU/
Dtrunc-cmp-constant.ll5 ; SI: buffer_load_ubyte [[LOAD:v[0-9]+]]
6 ; SI: v_and_b32_e32 [[TMP:v[0-9]+]], 1, [[LOAD]]
21 ; SI: buffer_load_ubyte [[LOAD:v[0-9]+]]
22 ; SI: v_and_b32_e32 [[TMP:v[0-9]+]], 1, [[LOAD]]
47 ; SI: buffer_load_ubyte [[LOAD:v[0-9]+]]
48 ; SI: v_and_b32_e32 [[RESULT:v[0-9]+]], 1, [[LOAD]]
59 ; SI: buffer_load_ubyte [[LOAD:v[0-9]+]]
60 ; SI: v_and_b32_e32 [[RESULT:v[0-9]+]], 1, [[LOAD]]
83 ; SI: buffer_load_ubyte [[LOAD:v[0-9]+]]
84 ; SI: v_and_b32_e32 [[TMP:v[0-9]+]], 1, [[LOAD]]
[all …]
Dtrunc-store-i1.ll6 ; SI: s_load_dword [[LOAD:s[0-9]+]],
7 ; SI: s_and_b32 [[SREG:s[0-9]+]], [[LOAD]], 1
25 ; SI: s_load_dword [[LOAD:s[0-9]+]],
26 ; SI: s_and_b32 [[SREG:s[0-9]+]], [[LOAD]], 1
Dmerge-stores.ll219 ; GCN: buffer_load_dwordx2 [[LOAD:v\[[0-9]+:[0-9]+\]]]
220 ; GCN: buffer_store_dwordx2 [[LOAD]]
234 ; GCN: buffer_load_dwordx2 [[LOAD:v\[[0-9]+:[0-9]+\]]], s{{\[[0-9]+:[0-9]+\]}}, 0 offset:8
235 ; GCN: buffer_store_dwordx2 [[LOAD]], s{{\[[0-9]+:[0-9]+\]}}, 0 offset:8
268 ; GCN: buffer_load_dwordx4 [[LOAD:v\[[0-9]+:[0-9]+\]]]
269 ; GCN: buffer_store_dwordx4 [[LOAD]]
314 ; GCN: buffer_load_dwordx4 [[LOAD:v\[[0-9]+:[0-9]+\]]]
315 ; GCN: buffer_store_dwordx4 [[LOAD]]
337 ; GCN: buffer_load_dwordx4 [[LOAD:v\[[0-9]+:[0-9]+\]]], s{{\[[0-9]+:[0-9]+\]}}, 0 offset:44
338 ; GCN: buffer_store_dwordx4 [[LOAD]], s{{\[[0-9]+:[0-9]+\]}}, 0 offset:28
[all …]
Dhalf.ll272 ; GCN: buffer_load_ushort [[LOAD:v[0-9]+]]
273 ; GCN: v_cvt_f32_f16_e32 [[CVT:v[0-9]+]], [[LOAD]]
369 ; GCN: buffer_load_ushort [[LOAD:v[0-9]+]]
370 ; GCN: v_cvt_f32_f16_e32 [[CVT0:v[0-9]+]], [[LOAD]]
398 ; GCN: buffer_load_dwordx2 [[LOAD:v\[[0-9]+:[0-9]+\]]]
399 ; SI: v_lshr_b64 v{{\[[0-9]+:[0-9]+\]}}, [[LOAD]], 32
400 ; VI: v_lshrrev_b64 v{{\[[0-9]+:[0-9]+\]}}, 32, [[LOAD]]
448 ; GCN: buffer_load_dword [[LOAD:v[0-9]+]]
449 ; GCN: v_cvt_f16_f32_e32 [[CVT:v[0-9]+]], [[LOAD]]
/external/llvm/test/tools/llvm-objdump/X86/
Dmacho-private-headers.test5 // RUN: | FileCheck %s -check-prefix=LOAD
362 LOAD: Load command 10
363 LOAD: cmd LC_LOAD_DYLIB
364 LOAD: cmdsize 48
365 LOAD: name /usr/lib/foo1.dylib (offset 24)
366 LOAD: current version 0.0.0
367 LOAD: compatibility version 0.0.0
368 LOAD: Load command 11
369 LOAD: cmd LC_LOAD_WEAK_DYLIB
370 LOAD: cmdsize 48
[all …]
/external/boringssl/src/crypto/chacha/
Dchacha_vec.c49 #define LOAD(m) ({ \ macro
83 #define LOAD(m) (vec) _mm_loadu_si128((__m128i *)(m)) macro
140 STORE(op + d + 0, LOAD(in + d + 0) ^ REVV_BE(v0)); \
141 STORE(op + d + 4, LOAD(in + d + 4) ^ REVV_BE(v1)); \
142 STORE(op + d + 8, LOAD(in + d + 8) ^ REVV_BE(v2)); \
143 STORE(op + d +12, LOAD(in + d +12) ^ REVV_BE(v3));
173 s1 = LOAD(&((vec*)kp)[0]); in CRYPTO_chacha_20_neon()
174 s2 = LOAD(&((vec*)kp)[1]); in CRYPTO_chacha_20_neon()
299 STORE(op + 0, LOAD(ip + 0) ^ REVV_BE(v0 + s0)); in CRYPTO_chacha_20_neon()
302 STORE(op + 4, LOAD(ip + 4) ^ REVV_BE(v1 + s1)); in CRYPTO_chacha_20_neon()
[all …]
/external/libevent/
Devthread_win32.c112 #define LOAD(name) \ in evthread_win32_condvar_init() macro
114 LOAD(InitializeConditionVariable); in evthread_win32_condvar_init()
115 LOAD(SleepConditionVariableCS); in evthread_win32_condvar_init()
116 LOAD(WakeAllConditionVariable); in evthread_win32_condvar_init()
117 LOAD(WakeConditionVariable); in evthread_win32_condvar_init()
/external/llvm/test/Transforms/InstCombine/
Dunpack-fca.ll64 ; CHECK-NEXT: [[LOAD:%[a-z0-9\.]+]] = load %A__vtbl*, %A__vtbl** [[GEP]], align 8
65 ; CHECK-NEXT: [[IV:%[a-z0-9\.]+]] = insertvalue %A undef, %A__vtbl* [[LOAD]], 0
87 ; CHECK-NEXT: [[LOAD:%[a-z0-9\.]+]] = load %A__vtbl*, %A__vtbl** [[GEP]], align 8
88 ; CHECK-NEXT: [[IV1:%[a-z0-9\.]+]] = insertvalue %A undef, %A__vtbl* [[LOAD]], 0
98 ; CHECK-NEXT: [[LOAD:%[a-z0-9\.]+]] = load %A__vtbl*, %A__vtbl** [[GEP]], align 8
99 ; CHECK-NEXT: [[IV1:%[a-z0-9\.]+]] = insertvalue %A undef, %A__vtbl* [[LOAD]], 0
109 ; CHECK-NEXT: [[LOAD:%[a-z0-9\.]+]] = load %A__vtbl*, %A__vtbl** [[GEP]], align 8
110 ; CHECK-NEXT: [[IV1:%[a-z0-9\.]+]] = insertvalue %A undef, %A__vtbl* [[LOAD]], 0
Dextractvalue.ll44 ; CHECK-NEXT: [[LOAD:%[A-Za-z0-9]+]] = load i32, i32* [[GEP]]
48 ; CHECK: call {{.*}}(i32 [[LOAD]])
50 ; CHECK: ret i32 [[LOAD]]
72 ; CHECK-NEXT: [[LOAD:%[A-Za-z0-9]+]] = load i16, i16* [[GEP]]
73 ; CHECK-NEXT: ret i16 [[LOAD]]
Dstruct-assign-tbaa.ll13 ; CHECK: %[[LOAD:.*]] = load i32, i32* %{{.*}}, align 4, !tbaa !0
14 ; CHECK: store i32 %[[LOAD:.*]], i32* %{{.*}}, align 4, !tbaa !0
/external/llvm/test/Transforms/GVN/
Dno_speculative_loads_with_asan.ll28 ; CHECK: %[[LOAD:[^ ]+]] = load i32
29 ; CHECK: {{.*}} = ashr i32 %[[LOAD]]
55 ; CHECK-NOT: %[[LOAD:[^ ]+]] = load i32
/external/v8/src/compiler/
Dmachine-operator.cc263 #define LOAD(Type) \ macro
279 MACHINE_TYPE_LIST(LOAD)
280 #undef LOAD
372 #define LOAD(Type) \ in Load() macro
376 MACHINE_TYPE_LIST(LOAD) in Load()
377 #undef LOAD in Load()
411 #define LOAD(Type) \ in CheckedLoad() macro
415 MACHINE_TYPE_LIST(LOAD) in CheckedLoad()
416 #undef LOAD in CheckedLoad()
/external/llvm/lib/Target/SystemZ/
DSystemZPatterns.td40 // with LOAD, OPERATOR and STORE being the read, modify and write
58 // The inserted operand is loaded using LOAD from an address of mode MODE.
98 // condition is false. Record that they are equivalent to a LOAD/select/STORE
115 // Try to use MVC instruction INSN for a load of type LOAD followed by a store
117 // LENGTH is the number of bytes loaded by LOAD.
125 // The other operand is a load of type LOAD, which accesses LENGTH bytes.
135 // LOAD/VT/LENGTH combination.
148 // Record that INSN is a LOAD AND TEST that can be used to compare
/external/llvm/test/Transforms/SimplifyCFG/
Dno_speculative_loads_with_tsan.ll18 ; CHECK: %[[LOAD:[^ ]*]] = load
19 ; CHECK: select{{.*}}[[LOAD]]
Dno_speculative_loads_with_asan.ll18 ; CHECK: %[[LOAD:[^ ]*]] = load
19 ; CHECK: select{{.*}}[[LOAD]]
/external/llvm/test/Object/
Dobjdump-private-headers.test9 ELF-i386: LOAD off 0x00000000 vaddr 0x08048000 paddr 0x08048000 align 2**12
15 ELF-x86-64: LOAD off 0x0000000000000000 vaddr 0x0000000000400000 paddr 0x0000000000400000 al…
/external/llvm/test/Transforms/SafeStack/
Dsetjmp2.ll32 ; CHECK-NEXT: %[[LOAD:.*]] = load i8*, i8** %[[DYNPTR]]
33 ; CHECK-NEXT: store i8* %[[LOAD]], i8** @__safestack_unsafe_stack_ptr
/external/autotest/client/site_tests/platform_ToolchainOptions/
Dloadwx_whitelist1 # LOAD section with no flags set at all.
Dloadwx_whitelist_x1 # LOAD section with no flags set at all.
/external/llvm/test/Bitcode/
Dinvalid.test18 RUN: FileCheck --check-prefix=MISMATCHED-EXPLICIT-LOAD %s
38 MISMATCHED-EXPLICIT-LOAD: Explicit load/store type does not match pointee type of pointer operand
132 RUN: FileCheck --check-prefix=LOAD-BAD-TYPE %s
134 LOAD-BAD-TYPE: Load/Store operand is not a pointer type
152 RUN: FileCheck --check-prefix=BAD-LOAD-PTR-TYPE %s
154 BAD-LOAD-PTR-TYPE: Cannot load/store from pointer

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