Searched refs:OP_SET (Results 1 – 10 of 10) sorted by relevance
| /external/mesa3d/src/gallium/drivers/nv50/codegen/ |
| D | nv50_ir_from_sm4.cpp | 379 case SM4_OPCODE_EQ: return OP_SET; in cvtOpcode()
384 case SM4_OPCODE_GE: return OP_SET; in cvtOpcode()
387 case SM4_OPCODE_IEQ: return OP_SET; in cvtOpcode()
388 case SM4_OPCODE_IGE: return OP_SET; in cvtOpcode()
389 case SM4_OPCODE_ILT: return OP_SET; in cvtOpcode()
394 case SM4_OPCODE_INE: return OP_SET; in cvtOpcode()
403 case SM4_OPCODE_LT: return OP_SET; in cvtOpcode()
410 case SM4_OPCODE_NE: return OP_SET; in cvtOpcode()
432 case SM4_OPCODE_ULT: return OP_SET; in cvtOpcode()
433 case SM4_OPCODE_UGE: return OP_SET; in cvtOpcode()
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| D | nv50_ir_peephole.cpp | 157 if (insn->op != OP_SET && insn->op != OP_SLCT) in checkSwapSrc01()
186 if (insn->op == OP_SET) in checkSwapSrc01()
296 while (insn && insn->op != OP_SET) { in findOriginForTestWithZero()
743 bld.mkCmp(OP_SET, CC_LT, TYPE_S32, tA, i->getSrc(0), bld.mkImm(0)); in opnd()
761 case OP_SET: // TODO: SET_AND,OR,XOR in opnd()
767 if (imm0.reg.data.u32 != 0 || !si || si->op != OP_SET) in opnd()
1130 if (set1->op != OP_SET) { in handleLOGOP()
1134 if (set1->op != OP_SET) in handleLOGOP()
1141 if (set0->op != OP_SET && in handleLOGOP()
1197 if (!insn || insn->op != OP_SET || insn->dType != TYPE_U32) in handleCVT()
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| D | nv50_ir_lowering_nv50.cpp | 171 i->op == OP_SET) in split64BitOp()
436 bld.mkCmp(OP_SET, CC_GE, TYPE_U32, (s = bld.getSSA()), m, b); in handleDIV()
817 i->op = OP_SET; in handleSLCT()
1021 bld.mkCmp(OP_SET, CC_NEU, TYPE_U32, cdst, bld.loadImm(NULL, 0), pred); in checkPredicate()
1054 case OP_SET: in visit()
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| D | nv50_ir_target_nv50.cpp | 99 { OP_SET, 0x3, 0x3, 0x0, 0x0, 0x2, 0x1, 0x1, 0x0 },
427 case OP_SET: in isModSupported()
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| D | nv50_ir.h | 77 OP_SET, enumerator
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| D | nv50_ir_from_tgsi.cpp | 1953 mkCmp(OP_SET, CC_GT, srcTy, val0, src0, zero); in handleInstruction()
1954 mkCmp(OP_SET, CC_LT, srcTy, val1, src0, zero); in handleInstruction()
2020 mkCmp(OP_SET, CC_LT, TYPE_F32, val0, fetchSrc(0, c), zero); in handleInstruction()
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| D | nv50_ir_emit_nv50.cpp | 1598 case OP_SET: in emitInstruction()
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| /external/mesa3d/src/gallium/drivers/nvc0/codegen/ |
| D | nv50_ir_target_nvc0.cpp | 234 { OP_SET, 0x3, 0x3, 0x0, 0x0, 0x2, 0x2 },
596 case OP_SET: in getThroughput()
623 case OP_SET: in getThroughput()
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| D | nv50_ir_lowering_nvc0.cpp | 493 i->op == OP_SET) in split64BitOp()
1041 bld.mkCmp(OP_SET, CC_NEU, TYPE_U32, pdst, bld.mkImm(0), pred); in checkPredicate()
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| D | nv50_ir_emit_nvc0.cpp | 893 if (i->op != OP_SET) in emitSET()
1643 case OP_SET: in emitInstruction()
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