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Searched refs:Orr (Results 1 – 18 of 18) sorted by relevance

/external/v8/test/cctest/
Dtest-assembler-arm64.cc264 __ Orr(csp, xzr, Operand(0x1fff)); in TEST() local
268 __ Orr(wcsp, wzr, Operand(0xfffffff8L)); in TEST() local
272 __ Orr(csp, xzr, Operand(0xfffffff8L)); in TEST() local
528 __ Orr(x2, x0, Operand(x1)); in TEST() local
529 __ Orr(w3, w0, Operand(w1, LSL, 28)); in TEST() local
530 __ Orr(x4, x0, Operand(x1, LSL, 32)); in TEST() local
531 __ Orr(x5, x0, Operand(x1, LSR, 4)); in TEST() local
532 __ Orr(w6, w0, Operand(w1, ASR, 4)); in TEST() local
533 __ Orr(x7, x0, Operand(x1, ASR, 4)); in TEST() local
534 __ Orr(w8, w0, Operand(w1, ROR, 12)); in TEST() local
[all …]
Dtest-disasm-arm64.cc1676 COMPARE(Orr(w2, w3, 0), "mov w2, w3"); in TEST_()
1677 COMPARE(Orr(x2, x3, 0), "mov x2, x3"); in TEST_()
1690 COMPARE(Orr(w14, w15, 0xffffffff), "movn w14, #0x0"); in TEST_()
1691 COMPARE(Orr(x14, x15, 0xffffffff), "orr x14, x15, #0xffffffff"); in TEST_()
1692 COMPARE(Orr(x14, x15, 0xffffffffffffffff), "movn x14, #0x0"); in TEST_()
/external/protobuf/
DCONTRIBUTORS.txt91 William Orr <will@worrbase.com>
/external/vixl/test/
Dtest-assembler-a64.cc258 __ Orr(sp, xzr, 0x1fff); in TEST() local
262 __ Orr(wsp, wzr, 0xfffffff8); in TEST() local
266 __ Orr(sp, xzr, 0xfffffff8); in TEST() local
523 __ Orr(x2, x0, Operand(x1)); in TEST() local
524 __ Orr(w3, w0, Operand(w1, LSL, 28)); in TEST() local
525 __ Orr(x4, x0, Operand(x1, LSL, 32)); in TEST() local
526 __ Orr(x5, x0, Operand(x1, LSR, 4)); in TEST() local
527 __ Orr(w6, w0, Operand(w1, ASR, 4)); in TEST() local
528 __ Orr(x7, x0, Operand(x1, ASR, 4)); in TEST() local
529 __ Orr(w8, w0, Operand(w1, ROR, 12)); in TEST() local
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Dtest-disasm-a64.cc2716 COMPARE(Orr(w2, w3, 0), "mov w2, w3"); in TEST()
2717 COMPARE(Orr(x2, x3, 0), "mov x2, x3"); in TEST()
2730 COMPARE(Orr(w14, w15, 0xffffffff), "mov w14, #0xffffffff"); in TEST()
2731 COMPARE(Orr(x14, x15, 0xffffffff), "orr x14, x15, #0xffffffff"); in TEST()
2732 COMPARE(Orr(x14, x15, 0xffffffffffffffff), "mov x14, #0xffffffffffffffff"); in TEST()
3809 COMPARE(Orr(v6.V8B(), v7.V8B(), v8.V8B()), "orr v6.8b, v7.8b, v8.8b"); in TEST()
3810 COMPARE(Orr(v6.V16B(), v7.V16B(), v8.V16B()), "orr v6.16b, v7.16b, v8.16b"); in TEST()
3812 COMPARE(Orr(v6.V8B(), v7.V8B(), v7.V8B()), "mov v6.8b, v7.8b"); in TEST()
3813 COMPARE(Orr(v6.V16B(), v7.V16B(), v7.V16B()), "mov v6.16b, v7.16b"); in TEST()
4648 COMPARE(Orr(v4.V4H(), 0xaa, 0), "orr v4.4h, #0xaa, lsl #0"); in TEST()
[all …]
/external/v8/src/regexp/arm64/
Dregexp-macro-assembler-arm64.cc343 __ Orr(w10, w10, 0x20); // Convert capture character to lower-case. in CheckNotBackReferenceIgnoreCase() local
344 __ Orr(w11, w11, 0x20); // Also convert input character. in CheckNotBackReferenceIgnoreCase() local
805 __ Orr(twice_non_position_value(), string_start_minus_one().X(), in GetCode() local
/external/v8/src/arm64/
Dmacro-assembler-arm64-inl.h89 void MacroAssembler::Orr(const Register& rd, in Orr() function
1373 Orr(tmp, value1, value2); in JumpIfBothSmi()
1413 Orr(tagged_obj, obj, kHeapObjectTag); in ObjectTag()
Dcodegen-arm64.cc626 __ Orr(temp1.W(), temp3.W(), Operand(temp1.W(), LSL, 20)); in EmitMathExp() local
Dcode-stubs-arm64.cc185 __ Orr(mantissa, mantissa, 1UL << HeapNumber::kMantissaBits); in Generate() local
369 __ Orr(scratch, left_type, right_type); in EmitStrictTwoHeapObjectCompare() local
3284 __ Orr(x12, lhs_type, rhs_type); in GenerateInternalizedStrings() local
3363 __ Orr(x12, lhs_type, rhs_type); in GenerateStrings() local
3383 __ Orr(x12, lhs_type, rhs_type); in GenerateStrings() local
5070 __ Orr(kind, kind, 1); in CreateArrayDispatchOneArgument() local
Dmacro-assembler-arm64.h168 inline void Orr(const Register& rd,
Dmacro-assembler-arm64.cc1398 Orr(fpcr, fpcr, DN_mask); in ConfigureFPCR()
/external/v8/src/compiler/arm64/
Dcode-generator-arm64.cc776 __ Orr(i.OutputRegister(), i.InputOrZeroRegister64(0), in AssembleArchInstruction() local
780 __ Orr(i.OutputRegister32(), i.InputOrZeroRegister32(0), in AssembleArchInstruction() local
/external/vixl/src/vixl/a64/
Dmacro-assembler-a64.h618 void Orr(const Register& rd,
2147 V(orr, Orr) \
2684 void Orr(const VRegister& vd,
Dmacro-assembler-a64.cc672 void MacroAssembler::Orr(const Register& rd, in Orr() function in vixl::MacroAssembler
/external/v8/src/full-codegen/arm64/
Dfull-codegen-arm64.cc66 __ Orr(temp, reg1, reg2); in EmitJumpIfEitherNotSmi() local
1962 __ Orr(x10, left, right); in EmitInlineSmiBinaryOp() local
2032 __ Orr(result, left, right); in EmitInlineSmiBinaryOp() local
/external/v8/src/crankshaft/arm64/
Dlithium-codegen-arm64.cc1689 case Token::BIT_OR: __ Orr(result, left, right); break; in DoBitI() local
1705 case Token::BIT_OR: __ Orr(result, left, right); break; in DoBitS() local
/external/selinux/policycoreutils/
DChangeLog459 Martin Orr. This fixes the restorecon /dev/stdin performed by Debian
/external/llvm/test/MC/Disassembler/AArch64/
Dneon-instructions.txt44 # Vector And, Orr, Eor, Orn, Bic