Searched refs:RHSLo (Results 1 – 4 of 4) sorted by relevance
/external/llvm/test/CodeGen/X86/ |
D | wide-integer-cmp.ll | 59 ; CHECK: movl 12(%esp), [[RHSLo:%[a-z]+]] 61 ; CHECK: cmpl 4(%esp), [[RHSLo]] 78 ; CHECK: movl 12(%esp), [[RHSLo:%[a-z]+]] 80 ; CHECK: cmpl 4(%esp), [[RHSLo]]
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | LegalizeIntegerTypes.cpp | 2704 SDValue LHSLo, LHSHi, RHSLo, RHSHi; in IntegerExpandSetCCOperands() local 2706 GetExpandedInteger(NewRHS, RHSLo, RHSHi); in IntegerExpandSetCCOperands() 2709 if (RHSLo == RHSHi) { in IntegerExpandSetCCOperands() 2710 if (ConstantSDNode *RHSCST = dyn_cast<ConstantSDNode>(RHSLo)) { in IntegerExpandSetCCOperands() 2715 NewRHS = RHSLo; in IntegerExpandSetCCOperands() 2721 NewLHS = DAG.getNode(ISD::XOR, dl, LHSLo.getValueType(), LHSLo, RHSLo); in IntegerExpandSetCCOperands() 2762 TLI.isTypeLegal(RHSLo.getValueType())) in IntegerExpandSetCCOperands() 2764 LHSLo, RHSLo, LowCC, false, DagCombineInfo, dl); in IntegerExpandSetCCOperands() 2767 LHSLo, RHSLo, LowCC); in IntegerExpandSetCCOperands() 2818 std::swap(LHSLo, RHSLo); in IntegerExpandSetCCOperands() [all …]
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D | LegalizeVectorTypes.cpp | 707 SDValue RHSLo, RHSHi; in SplitVecRes_BinOp() local 708 GetSplitVector(N->getOperand(1), RHSLo, RHSHi); in SplitVecRes_BinOp() 713 Lo = DAG.getNode(Opcode, dl, LHSLo.getValueType(), LHSLo, RHSLo, Flags); in SplitVecRes_BinOp() 891 SDValue RHSLo, RHSHi; in SplitVecRes_FCOPYSIGN() local 895 GetSplitVector(RHS, RHSLo, RHSHi); in SplitVecRes_FCOPYSIGN() 897 std::tie(RHSLo, RHSHi) = DAG.SplitVector(RHS, SDLoc(RHS)); in SplitVecRes_FCOPYSIGN() 900 Lo = DAG.getNode(ISD::FCOPYSIGN, DL, LHSLo.getValueType(), LHSLo, RHSLo); in SplitVecRes_FCOPYSIGN()
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D | LegalizeFloatTypes.cpp | 1520 SDValue LHSLo, LHSHi, RHSLo, RHSHi; in FloatExpandSetCCOperands() local 1522 GetExpandedFloat(NewRHS, RHSLo, RHSHi); in FloatExpandSetCCOperands() 1535 LHSLo, RHSLo, CCCode); in FloatExpandSetCCOperands()
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