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Searched refs:RRX (Results 1 – 11 of 11) sorted by relevance

/external/v8/src/arm/
Dconstants-arm.h250 RRX = -1, enumerator
Dassembler-arm.cc289 } else if (shift_op == RRX) { in Operand()
299 DCHECK(shift_op != RRX); in Operand()
/external/llvm/lib/Target/ARM/
DARMISelLowering.h68 RRX, // V = RRX X, Flag -> srl X, 1 + shift in carry flag. enumerator
DARMExpandPseudoInsts.cpp965 case ARM::RRX: { in ExpandMI()
DARMScheduleSwift.td150 // ASR,LSL,ROR,RRX
DARMInstrInfo.td155 def ARMrrx : SDNode<"ARMISD::RRX" , SDTIntUnaryOp, [SDNPInGlue ]>;
3338 def RRX: PseudoInst<(outs GPR:$Rd), (ins GPR:$Rm), IIC_iMOVsi,
5682 // LSR, ROR, and RRX instructions.
DARMISelLowering.cpp1128 case ARMISD::RRX: return "ARMISD::RRX"; in getTargetNodeName()
4601 Lo = DAG.getNode(ARMISD::RRX, dl, MVT::i32, Lo, Hi.getValue(1)); in Expand64BitShift()
/external/llvm/test/MC/Disassembler/ARM/
Dthumb2.txt1530 # RRX
Dbasic-arm-instructions.txt1392 # RRX/RRXS
/external/llvm/test/MC/ARM/
Dbasic-arm-instructions.s2144 @ RRX/RRXS
Dbasic-thumb2-instructions.s2018 @ RRX