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Searched refs:RSQ (Results 1 – 15 of 15) sorted by relevance

/external/llvm/test/CodeGen/AMDGPU/
Dllvm.AMDGPU.rsq.clamped.ll11 ; VI: v_rsq_f32_e32 [[RSQ:v[0-9]+]], {{s[0-9]+}}
12 ; VI: v_min_f32_e32 [[MIN:v[0-9]+]], 0x7f7fffff, [[RSQ]]
Dllvm.AMDGPU.rsq.clamped.f64.ll9 ; VI: v_rsq_f64_e32 [[RSQ:v\[[0-9]+:[0-9]+\]]], s[2:3]
14 ; VI: v_min_f64 v[0:1], [[RSQ]], s{{\[}}[[LOW1]]:[[HIGH1]]]
/external/mesa3d/src/gallium/tests/graw/fragment-shader/
Dfrag-rsq.sh12 RSQ TEMP[0].x, TEMP[0].xxxx
/external/mesa3d/src/gallium/tests/graw/vertex-shader/
Dvert-rsq.sh14 RSQ TEMP[0].x, TEMP[0].xxxx
/external/mesa3d/src/gallium/auxiliary/tgsi/
Dtgsi_opcode_tmp.h47 OP11(RSQ)
/external/mesa3d/src/mesa/program/
Dprogram_lexer.l227 RSQ{szf}{cc}{sat} { return_opcode( 1, SCALAR_OP, RSQ, 3); }
/external/llvm/lib/Target/AMDGPU/
DAMDGPUISelLowering.h254 RSQ, enumerator
DAMDGPUInstrInfo.td60 def AMDGPUrsq : SDNode<"AMDGPUISD::RSQ", SDTFPUnaryOp>;
DAMDGPUISelLowering.cpp951 return DAG.getNode(AMDGPUISD::RSQ, DL, VT, Op.getOperand(1)); in LowerINTRINSIC_WO_CHAIN()
962 SDValue Rsq = DAG.getNode(AMDGPUISD::RSQ, DL, VT, Op.getOperand(1)); in LowerINTRINSIC_WO_CHAIN()
2690 NODE_NAME_CASE(RSQ) in getTargetNodeName()
2744 return DAG.getNode(AMDGPUISD::RSQ, SDLoc(Operand), VT, Operand); in getRsqrtEstimate()
DSIISelLowering.cpp1430 return DAG.getNode(AMDGPUISD::RSQ, SL, VT, RHS.getOperand(0)); in LowerFastFDIV()
/external/mesa3d/src/gallium/state_trackers/d3d1x/gd3d1x/
Dsm4_to_tgsi.cpp284 OP1(RSQ); in translate_insns()
/external/mesa3d/src/gallium/drivers/nv50/codegen/
Dnv50_ir_from_tgsi.cpp456 NV50_IR_OPCODE_CASE(RSQ, RSQ); in translateOpcode()
/external/mesa3d/src/mesa/drivers/dri/r200/
Dr200_vertprog.c92 OPN(RSQ, 1|SCALAR_FLAG),
/external/mesa3d/src/gallium/drivers/nv30/
Dnvfx_vertprog.c651 nvfx_vp_emit(vpc, arith(sat, SCA, RSQ, dst, mask, none, none, abs(src[0]))); in nvfx_vertprog_parse_instruction()
/external/mesa3d/src/gallium/docs/source/
Dtgsi.rst83 .. opcode:: RSQ - Reciprocal Square Root