Searched refs:RegLo (Results 1 – 2 of 2) sorted by relevance
| /external/llvm/lib/Target/AMDGPU/AsmParser/ |
| D | AMDGPUAsmParser.cpp | 549 int64_t RegLo, RegHi; in ParseRegister() local
555 if (getParser().parseAbsoluteExpression(RegLo)) in ParseRegister()
569 RegWidth = (RegHi - RegLo) + 1; in ParseRegister()
572 RegIndexInClass = RegLo; in ParseRegister()
576 if (RegLo % Size != 0) in ParseRegister()
579 RegIndexInClass = RegLo / Size; in ParseRegister()
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| /external/llvm/lib/Target/AMDGPU/ |
| D | SIInstrInfo.cpp | 855 unsigned RegLo = TRI->getSubReg(Reg, AMDGPU::sub0); in expandPostRAPseudo() local
865 Bundler.append(BuildMI(MF, DL, get(AMDGPU::S_ADD_U32), RegLo) in expandPostRAPseudo()
866 .addReg(RegLo) in expandPostRAPseudo()
2242 unsigned RegLo = MRI.createVirtualRegister(HalfRC); in splitSMRD() local
2261 Lo = BuildMI(*MBB, MI, DL, get(HalfImmOp), RegLo) in splitSMRD()
2285 Lo = BuildMI(*MBB, MI, DL, get(HalfSGPROp), RegLo) in splitSMRD()
2331 .addReg(RegLo) in splitSMRD()
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