| /external/llvm/include/llvm/CodeGen/ |
| D | MachineRegisterInfo.h | 80 MachineOperand *&getRegUseDefListHead(unsigned RegNo) { in getRegUseDefListHead() argument
81 if (TargetRegisterInfo::isVirtualRegister(RegNo)) in getRegUseDefListHead()
82 return VRegInfo[RegNo].second; in getRegUseDefListHead()
83 return PhysRegUseDefLists[RegNo]; in getRegUseDefListHead()
86 MachineOperand *getRegUseDefListHead(unsigned RegNo) const { in getRegUseDefListHead() argument
87 if (TargetRegisterInfo::isVirtualRegister(RegNo)) in getRegUseDefListHead()
88 return VRegInfo[RegNo].second; in getRegUseDefListHead()
89 return PhysRegUseDefLists[RegNo]; in getRegUseDefListHead()
231 reg_iterator reg_begin(unsigned RegNo) const { in reg_begin() argument
232 return reg_iterator(getRegUseDefListHead(RegNo)); in reg_begin()
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| D | CallingConvLower.h | 78 unsigned RegNo, MVT LocVT, in getReg() argument
82 Ret.Loc = RegNo; in getReg()
92 unsigned RegNo, MVT LocVT, in getCustomReg() argument
95 Ret = getReg(ValNo, ValVT, RegNo, LocVT, HTP); in getCustomReg()
130 void convertToReg(unsigned RegNo) { in convertToReg() argument
131 Loc = RegNo; in convertToReg()
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| /external/llvm/lib/Target/SystemZ/Disassembler/ |
| D | SystemZDisassembler.cpp | 49 static DecodeStatus decodeRegisterClass(MCInst &Inst, uint64_t RegNo, in decodeRegisterClass() argument
51 assert(RegNo < Size && "Invalid register"); in decodeRegisterClass()
52 RegNo = Regs[RegNo]; in decodeRegisterClass()
53 if (RegNo == 0) in decodeRegisterClass()
55 Inst.addOperand(MCOperand::createReg(RegNo)); in decodeRegisterClass()
59 static DecodeStatus DecodeGR32BitRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeGR32BitRegisterClass() argument
62 return decodeRegisterClass(Inst, RegNo, SystemZMC::GR32Regs, 16); in DecodeGR32BitRegisterClass()
65 static DecodeStatus DecodeGRH32BitRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeGRH32BitRegisterClass() argument
68 return decodeRegisterClass(Inst, RegNo, SystemZMC::GRH32Regs, 16); in DecodeGRH32BitRegisterClass()
71 static DecodeStatus DecodeGR64BitRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeGR64BitRegisterClass() argument
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| /external/llvm/lib/Target/Mips/Disassembler/ |
| D | MipsDisassembler.cpp | 68 unsigned RegNo,
73 unsigned RegNo,
78 unsigned RegNo,
83 unsigned RegNo,
88 unsigned RegNo,
93 unsigned RegNo,
103 unsigned RegNo,
108 unsigned RegNo,
113 unsigned RegNo,
118 unsigned RegNo,
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| /external/llvm/lib/Target/X86/MCTargetDesc/ |
| D | X86BaseInfo.h | 722 inline bool isX86_64ExtendedReg(unsigned RegNo) { in isX86_64ExtendedReg() argument
723 if ((RegNo > X86::XMM7 && RegNo <= X86::XMM15) || in isX86_64ExtendedReg()
724 (RegNo > X86::XMM23 && RegNo <= X86::XMM31) || in isX86_64ExtendedReg()
725 (RegNo > X86::YMM7 && RegNo <= X86::YMM15) || in isX86_64ExtendedReg()
726 (RegNo > X86::YMM23 && RegNo <= X86::YMM31) || in isX86_64ExtendedReg()
727 (RegNo > X86::ZMM7 && RegNo <= X86::ZMM15) || in isX86_64ExtendedReg()
728 (RegNo > X86::ZMM23 && RegNo <= X86::ZMM31)) in isX86_64ExtendedReg()
731 switch (RegNo) { in isX86_64ExtendedReg()
750 static inline bool is32ExtendedReg(unsigned RegNo) { in is32ExtendedReg() argument
751 return ((RegNo > X86::XMM15 && RegNo <= X86::XMM31) || in is32ExtendedReg()
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| /external/llvm/lib/Target/PowerPC/Disassembler/ |
| D | PPCDisassembler.cpp | 208 static DecodeStatus decodeRegisterClass(MCInst &Inst, uint64_t RegNo, in decodeRegisterClass() argument
210 assert(RegNo < N && "Invalid register number"); in decodeRegisterClass()
211 Inst.addOperand(MCOperand::createReg(Regs[RegNo])); in decodeRegisterClass()
215 static DecodeStatus DecodeCRRCRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeCRRCRegisterClass() argument
218 return decodeRegisterClass(Inst, RegNo, CRRegs); in DecodeCRRCRegisterClass()
221 static DecodeStatus DecodeCRRC0RegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeCRRC0RegisterClass() argument
224 return decodeRegisterClass(Inst, RegNo, CRRegs); in DecodeCRRC0RegisterClass()
227 static DecodeStatus DecodeCRBITRCRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeCRBITRCRegisterClass() argument
230 return decodeRegisterClass(Inst, RegNo, CRBITRegs); in DecodeCRBITRCRegisterClass()
233 static DecodeStatus DecodeF4RCRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeF4RCRegisterClass() argument
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| /external/llvm/lib/Target/Sparc/AsmParser/ |
| D | SparcAsmParser.cpp | 53 bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc) override;
77 bool matchRegisterName(const AsmToken &Tok, unsigned &RegNo,
559 ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc) in ParseRegister() argument
564 RegNo = 0; in ParseRegister()
569 if (matchRegisterName(Tok, RegNo, regKind)) { in ParseRegister()
737 unsigned RegNo, RegKind; in parseOperand() local
738 if (!matchRegisterName(Parser.getTok(), RegNo, RegKind)) in parseOperand()
743 Operands.push_back(SparcOperand::CreateReg(RegNo, RegKind, S, E)); in parseOperand()
796 unsigned RegNo; in parseSparcAsmOperand() local
798 if (matchRegisterName(Parser.getTok(), RegNo, RegKind)) { in parseSparcAsmOperand()
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| /external/llvm/lib/Target/AArch64/Disassembler/ |
| D | AArch64Disassembler.cpp | 34 unsigned RegNo, uint64_t Address,
37 unsigned RegNo,
40 static DecodeStatus DecodeFPR64RegisterClass(llvm::MCInst &Inst, unsigned RegNo,
43 static DecodeStatus DecodeFPR32RegisterClass(llvm::MCInst &Inst, unsigned RegNo,
46 static DecodeStatus DecodeFPR16RegisterClass(llvm::MCInst &Inst, unsigned RegNo,
49 static DecodeStatus DecodeFPR8RegisterClass(llvm::MCInst &Inst, unsigned RegNo,
52 static DecodeStatus DecodeGPR64RegisterClass(llvm::MCInst &Inst, unsigned RegNo,
56 unsigned RegNo, uint64_t Address,
58 static DecodeStatus DecodeGPR32RegisterClass(llvm::MCInst &Inst, unsigned RegNo,
62 unsigned RegNo, uint64_t Address,
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| /external/llvm/lib/Target/Sparc/Disassembler/ |
| D | SparcDisassembler.cpp | 134 unsigned RegNo, in DecodeIntRegsRegisterClass() argument
137 if (RegNo > 31) in DecodeIntRegsRegisterClass()
139 unsigned Reg = IntRegDecoderTable[RegNo]; in DecodeIntRegsRegisterClass()
145 unsigned RegNo, in DecodeI64RegsRegisterClass() argument
148 if (RegNo > 31) in DecodeI64RegsRegisterClass()
150 unsigned Reg = IntRegDecoderTable[RegNo]; in DecodeI64RegsRegisterClass()
157 unsigned RegNo, in DecodeFPRegsRegisterClass() argument
160 if (RegNo > 31) in DecodeFPRegsRegisterClass()
162 unsigned Reg = FPRegDecoderTable[RegNo]; in DecodeFPRegsRegisterClass()
169 unsigned RegNo, in DecodeDFPRegsRegisterClass() argument
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| /external/llvm/lib/CodeGen/AsmPrinter/ |
| D | DbgValueHistoryCalculator.cpp | 79 static void dropRegDescribedVar(RegDescribedVarsMap &RegVars, unsigned RegNo, in dropRegDescribedVar() argument
81 const auto &I = RegVars.find(RegNo); in dropRegDescribedVar()
82 assert(RegNo != 0U && I != RegVars.end()); in dropRegDescribedVar()
93 static void addRegDescribedVar(RegDescribedVarsMap &RegVars, unsigned RegNo, in addRegDescribedVar() argument
95 assert(RegNo != 0U); in addRegDescribedVar()
96 auto &VarSet = RegVars[RegNo]; in addRegDescribedVar()
116 static void clobberRegisterUses(RegDescribedVarsMap &RegVars, unsigned RegNo, in clobberRegisterUses() argument
119 const auto &I = RegVars.find(RegNo); in clobberRegisterUses()
196 applyToClobberedRegisters(MI, TRI, [&](unsigned RegNo) { in calculateDbgValueHistory() argument
197 if (ChangingRegs.test(RegNo)) in calculateDbgValueHistory()
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| /external/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyAsmPrinter.cpp | 81 MVT getRegType(unsigned RegNo) const;
92 MVT WebAssemblyAsmPrinter::getRegType(unsigned RegNo) const { in getRegType()
94 TargetRegisterInfo::isVirtualRegister(RegNo) ? in getRegType()
95 MRI->getRegClass(RegNo) : in getRegType()
96 MRI->getTargetRegisterInfo()->getMinimalPhysRegClass(RegNo); in getRegType()
100 DEBUG(errs() << "Unknown type for register number: " << RegNo); in getRegType()
106 unsigned RegNo = MO.getReg(); in regToString() local
107 assert(TargetRegisterInfo::isVirtualRegister(RegNo) && in regToString()
109 assert(!MFI->isVRegStackified(RegNo)); in regToString()
110 unsigned WAReg = MFI->getWAReg(RegNo); in regToString()
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| /external/llvm/lib/Target/PowerPC/InstPrinter/ |
| D | PPCInstPrinter.cpp | 39 void PPCInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const { in printRegName()
40 const char *RegName = getRegisterName(RegNo); in printRegName()
355 unsigned RegNo; in printcrbitm() local
358 case PPC::CR0: RegNo = 0; break; in printcrbitm()
359 case PPC::CR1: RegNo = 1; break; in printcrbitm()
360 case PPC::CR2: RegNo = 2; break; in printcrbitm()
361 case PPC::CR3: RegNo = 3; break; in printcrbitm()
362 case PPC::CR4: RegNo = 4; break; in printcrbitm()
363 case PPC::CR5: RegNo = 5; break; in printcrbitm()
364 case PPC::CR6: RegNo = 6; break; in printcrbitm()
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| /external/llvm/include/llvm/MC/ |
| D | MCRegisterInfo.h | 323 const MCRegisterDesc &operator[](unsigned RegNo) const {
324 assert(RegNo < NumRegs &&
326 return Desc[RegNo];
331 const MCRegisterDesc &get(unsigned RegNo) const { in get() argument
332 return operator[](RegNo); in get()
348 unsigned getSubRegIndex(unsigned RegNo, unsigned SubRegNo) const;
362 const char *getName(unsigned RegNo) const { in getName() argument
363 return RegStrings + get(RegNo).Name; in getName()
418 uint16_t getEncodingValue(unsigned RegNo) const { in getEncodingValue() argument
419 assert(RegNo < NumRegs && in getEncodingValue()
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| /external/llvm/lib/Target/Mips/ |
| D | MipsTargetStreamer.h | 39 virtual void emitDirectiveSetAtWithArg(unsigned RegNo);
80 virtual void emitDirectiveCpLoad(unsigned RegNo);
83 virtual void emitDirectiveCpsetup(unsigned RegNo, int RegOrOffset,
154 void emitDirectiveSetAtWithArg(unsigned RegNo) override;
195 void emitDirectiveCpLoad(unsigned RegNo) override;
198 void emitDirectiveCpsetup(unsigned RegNo, int RegOrOffset,
248 void emitDirectiveCpLoad(unsigned RegNo) override;
251 void emitDirectiveCpsetup(unsigned RegNo, int RegOrOffset,
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| /external/llvm/lib/Target/Hexagon/Disassembler/ |
| D | HexagonDisassembler.cpp | 67 static DecodeStatus DecodeIntRegsRegisterClass(MCInst &Inst, unsigned RegNo,
70 static DecodeStatus DecodeIntRegsLow8RegisterClass(MCInst &Inst, unsigned RegNo,
73 static DecodeStatus DecodeVectorRegsRegisterClass(MCInst &Inst, unsigned RegNo,
76 static DecodeStatus DecodeDoubleRegsRegisterClass(MCInst &Inst, unsigned RegNo,
79 static DecodeStatus DecodeVecDblRegsRegisterClass(MCInst &Inst, unsigned RegNo,
82 static DecodeStatus DecodePredRegsRegisterClass(MCInst &Inst, unsigned RegNo,
85 static DecodeStatus DecodeVecPredRegsRegisterClass(MCInst &Inst, unsigned RegNo,
88 static DecodeStatus DecodeCtrRegsRegisterClass(MCInst &Inst, unsigned RegNo,
91 static DecodeStatus DecodeModRegsRegisterClass(MCInst &Inst, unsigned RegNo,
94 static DecodeStatus DecodeCtrRegs64RegisterClass(MCInst &Inst, unsigned RegNo,
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| /external/llvm/lib/Target/AArch64/InstPrinter/ |
| D | AArch64InstPrinter.h | 33 void printRegName(raw_ostream &OS, unsigned RegNo) const override;
44 virtual StringRef getRegName(unsigned RegNo) const { in getRegName() argument
45 return getRegisterName(RegNo); in getRegName()
47 static const char *getRegisterName(unsigned RegNo,
182 StringRef getRegName(unsigned RegNo) const override { in getRegName() argument
183 return getRegisterName(RegNo); in getRegName()
185 static const char *getRegisterName(unsigned RegNo,
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| /external/llvm/lib/Target/X86/AsmParser/ |
| D | X86AsmParser.cpp | 749 bool OmitRegisterFromClobberLists(unsigned RegNo) override;
815 bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc) override;
817 void SetFrameRegister(unsigned RegNo) override;
892 bool X86AsmParser::ParseRegister(unsigned &RegNo, in ParseRegister() argument
895 RegNo = 0; in ParseRegister()
913 RegNo = MatchRegisterName(Tok.getString()); in ParseRegister()
916 if (RegNo == 0) in ParseRegister()
917 RegNo = MatchRegisterName(Tok.getString().lower()); in ParseRegister()
921 if (isParsingInlineAsm() && isParsingIntelSyntax() && RegNo == X86::EFLAGS) in ParseRegister()
922 RegNo = 0; in ParseRegister()
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| D | X86Operand.h | 45 unsigned RegNo; member
99 return Reg.RegNo; in getReg()
389 static unsigned getGR32FromGR64(unsigned RegNo) { in getGR32FromGR64()
390 switch (RegNo) { in getGR32FromGR64()
414 unsigned RegNo = getReg(); in addGR32orGR64Operands() local
415 if (X86MCRegisterClasses[X86::GR64RegClassID].contains(RegNo)) in addGR32orGR64Operands()
416 RegNo = getGR32FromGR64(RegNo); in addGR32orGR64Operands()
417 Inst.addOperand(MCOperand::createReg(RegNo)); in addGR32orGR64Operands()
475 CreateReg(unsigned RegNo, SMLoc StartLoc, SMLoc EndLoc,
479 Res->Reg.RegNo = RegNo;
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| /external/llvm/lib/Target/Mips/MCTargetDesc/ |
| D | MipsTargetStreamer.cpp | 45 void MipsTargetStreamer::emitDirectiveSetAtWithArg(unsigned RegNo) { in emitDirectiveSetAtWithArg() argument
91 void MipsTargetStreamer::emitDirectiveCpLoad(unsigned RegNo) {} in emitDirectiveCpLoad() argument
96 void MipsTargetStreamer::emitDirectiveCpsetup(unsigned RegNo, int RegOrOffset, in emitDirectiveCpsetup() argument
178 void MipsTargetAsmStreamer::emitDirectiveSetAtWithArg(unsigned RegNo) { in emitDirectiveSetAtWithArg() argument
179 OS << "\t.set\tat=$" << Twine(RegNo) << "\n"; in emitDirectiveSetAtWithArg()
180 MipsTargetStreamer::emitDirectiveSetAtWithArg(RegNo); in emitDirectiveSetAtWithArg()
361 void MipsTargetAsmStreamer::emitDirectiveCpLoad(unsigned RegNo) { in emitDirectiveCpLoad() argument
363 << StringRef(MipsInstPrinter::getRegisterName(RegNo)).lower() << "\n"; in emitDirectiveCpLoad()
373 void MipsTargetAsmStreamer::emitDirectiveCpsetup(unsigned RegNo, in emitDirectiveCpsetup() argument
378 << StringRef(MipsInstPrinter::getRegisterName(RegNo)).lower() << ", "; in emitDirectiveCpsetup()
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| /external/llvm/lib/Target/WebAssembly/InstPrinter/ |
| D | WebAssemblyInstPrinter.cpp | 39 unsigned RegNo) const { in printRegName()
40 assert(RegNo != WebAssemblyFunctionInfo::UnusedReg); in printRegName()
42 OS << "$" << RegNo; in printRegName()
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| D | WebAssemblyInstPrinter.h | 31 void printRegName(raw_ostream &OS, unsigned RegNo) const override;
40 static const char *getRegisterName(unsigned RegNo);
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| /external/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| D | HexagonInstPrinter.h | 35 StringRef getRegName(unsigned RegNo) const;
36 static char const *getRegisterName(unsigned RegNo);
37 void printRegName(raw_ostream &O, unsigned RegNo) const override;
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| /external/llvm/lib/Target/X86/ |
| D | X86FloatingPoint.cpp | 171 unsigned getSlot(unsigned RegNo) const { in getSlot()
172 assert(RegNo < NumFPRegs && "Regno out of range!"); in getSlot()
173 return RegMap[RegNo]; in getSlot()
177 bool isLive(unsigned RegNo) const { in isLive()
178 unsigned Slot = getSlot(RegNo); in isLive()
179 return Slot < StackTop && Stack[Slot] == RegNo; in isLive()
191 unsigned getSTReg(unsigned RegNo) const { in getSTReg()
192 return StackTop - 1 - getSlot(RegNo) + X86::ST0; in getSTReg()
204 bool isAtTop(unsigned RegNo) const { return getSlot(RegNo) == StackTop-1; } in isAtTop()
205 void moveToTop(unsigned RegNo, MachineBasicBlock::iterator I) { in moveToTop()
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| /external/llvm/lib/Target/NVPTX/InstPrinter/ |
| D | NVPTXInstPrinter.cpp | 35 void NVPTXInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const { in printRegName()
38 unsigned RCId = (RegNo >> 28); in printRegName()
44 OS << getRegisterName(RegNo); in printRegName()
66 unsigned VReg = RegNo & 0x0FFFFFFF; in printRegName()
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| /external/llvm/lib/Target/NVPTX/ |
| D | NVPTXRegisterInfo.h | 52 const char *getName(unsigned RegNo) const { in getName() argument
54 O << "reg" << RegNo; in getName()
|