Searched refs:SYSm (Results 1 – 3 of 3) sorted by relevance
/external/llvm/test/MC/Disassembler/ARM/ |
D | invalid-thumb-MSR-MClass.txt | 8 # invalid SYSm 22 # invalid mask = '11' with SYSm not in {0..3} 32 # invalid SYSm
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/external/llvm/lib/Target/ARM/InstPrinter/ |
D | ARMInstPrinter.cpp | 803 unsigned SYSm = Op.getImm(); in printMSRMaskOperand() local 808 switch (SYSm) { in printMSRMaskOperand() 837 SYSm &= 0xff; in printMSRMaskOperand() 842 switch (SYSm) { in printMSRMaskOperand() 858 switch (SYSm) { in printMSRMaskOperand()
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/external/llvm/lib/Target/ARM/ |
D | ARMInstrThumb2.td | 4044 def t2MRS_M : T2I<(outs rGPR:$Rd), (ins msr_mask:$SYSm), NoItinerary, 4045 "mrs", "\t$Rd, $SYSm", []>, 4048 bits<8> SYSm; 4051 let Inst{7-0} = SYSm; 4101 def t2MSR_M : T2I<(outs), (ins msr_mask:$SYSm, rGPR:$Rn), 4102 NoItinerary, "msr", "\t$SYSm, $Rn", []>, 4104 bits<12> SYSm; 4110 let Inst{11-10} = SYSm{11-10}; 4112 let Inst{7-0} = SYSm{7-0};
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