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Searched refs:Src2Reg (Results 1 – 7 of 7) sorted by relevance

/external/llvm/lib/Target/Hexagon/MCTargetDesc/
DHexagonMCDuplexInfo.cpp181 unsigned DstReg, PredReg, SrcReg, Src1Reg, Src2Reg; in getDuplexCandidateGroup() local
321 Src2Reg = MCI.getOperand(2).getReg(); in getDuplexCandidateGroup()
323 HexagonMCInstrInfo::isIntRegForSubInst(Src2Reg) && in getDuplexCandidateGroup()
329 HexagonMCInstrInfo::isIntRegForSubInst(Src2Reg) && in getDuplexCandidateGroup()
337 Src2Reg = MCI.getOperand(2).getReg(); in getDuplexCandidateGroup()
339 HexagonMCInstrInfo::isIntRegForSubInst(Src2Reg) && in getDuplexCandidateGroup()
356 Src2Reg = MCI.getOperand(2).getReg(); in getDuplexCandidateGroup()
358 HexagonMCInstrInfo::isIntRegForSubInst(Src2Reg) && in getDuplexCandidateGroup()
366 Src2Reg = MCI.getOperand(2).getReg(); in getDuplexCandidateGroup()
367 if (HexagonMCInstrInfo::isDblRegForSubInst(Src2Reg) && in getDuplexCandidateGroup()
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DHexagonMCCompound.cpp84 unsigned DstReg, SrcReg, Src1Reg, Src2Reg; in getCompoundCandidateGroup() local
102 Src2Reg = MI.getOperand(2).getReg(); in getCompoundCandidateGroup()
105 HexagonMCInstrInfo::isIntRegForSubInst(Src2Reg)) in getCompoundCandidateGroup()
/external/llvm/lib/Target/Hexagon/
DHexagonInstrInfo.cpp910 unsigned Src2Reg = MI->getOperand(2).getReg(); in expandPostRAPseudo() local
913 unsigned Src2SubHi = HRI.getSubReg(Src2Reg, Hexagon::subreg_hireg); in expandPostRAPseudo()
914 unsigned Src2SubLo = HRI.getSubReg(Src2Reg, Hexagon::subreg_loreg); in expandPostRAPseudo()
932 unsigned Src2Reg = MI->getOperand(2).getReg(); in expandPostRAPseudo() local
936 unsigned Src2SubHi = HRI.getSubReg(Src2Reg, Hexagon::subreg_hireg); in expandPostRAPseudo()
937 unsigned Src2SubLo = HRI.getSubReg(Src2Reg, Hexagon::subreg_loreg); in expandPostRAPseudo()
2839 unsigned DstReg, SrcReg, Src1Reg, Src2Reg; in getCompoundCandidateGroup() local
2855 Src2Reg = MI->getOperand(2).getReg(); in getCompoundCandidateGroup()
2858 isIntRegForSubInst(Src1Reg) && isIntRegForSubInst(Src2Reg)) in getCompoundCandidateGroup()
3172 unsigned DstReg, SrcReg, Src1Reg, Src2Reg; in getDuplexCandidateGroup() local
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/external/llvm/lib/Target/ARM/
DMLxExpansionPass.cpp279 unsigned Src2Reg = MI->getOperand(3).getReg(); in ExpandFPMLxInstruction() local
295 .addReg(Src2Reg, getKillRegState(Src2Kill)); in ExpandFPMLxInstruction()
/external/llvm/lib/Target/AArch64/
DAArch64FastISel.cpp2541 unsigned Src2Reg = getRegForValue(Src2Val); in optimizeSelect() local
2542 if (!Src2Reg) in optimizeSelect()
2551 Src1IsKill, Src2Reg, Src2IsKill); in optimizeSelect()
2669 unsigned Src2Reg = getRegForValue(SI->getFalseValue()); in selectSelect() local
2672 if (!Src1Reg || !Src2Reg) in selectSelect()
2676 Src2Reg = fastEmitInst_rri(Opc, RC, Src1Reg, Src1IsKill, Src2Reg, in selectSelect()
2680 unsigned ResultReg = fastEmitInst_rri(Opc, RC, Src1Reg, Src1IsKill, Src2Reg, in selectSelect()
/external/llvm/lib/Target/Mips/
DMipsFastISel.cpp982 unsigned Src2Reg = getRegForValue(SI->getFalseValue()); in selectSelect() local
985 if (!Src1Reg || !Src2Reg || !CondReg) in selectSelect()
1001 emitInst(TargetOpcode::COPY, TempReg).addReg(Src2Reg); in selectSelect()
/external/llvm/lib/Target/AMDGPU/
DSIInstrInfo.cpp1099 unsigned Src2Reg = Src2->getReg(); in FoldImmediate() local
1105 Src1->setReg(Src2Reg); in FoldImmediate()