Home
last modified time | relevance | path

Searched refs:TGSI_OPCODE_SEQ (Results 1 – 17 of 17) sorted by relevance

/external/mesa3d/src/gallium/auxiliary/tgsi/
Dtgsi_util.c208 case TGSI_OPCODE_SEQ: in tgsi_util_get_inst_usage_mask()
Dtgsi_info.c85 { 1, 2, 0, 0, 0, 0, COMP, "SEQ", TGSI_OPCODE_SEQ },
Dtgsi_ppc.c727 case TGSI_OPCODE_SEQ: in emit_inequality()
1113 case TGSI_OPCODE_SEQ: in emit_instruction()
Dtgsi_exec.c3624 case TGSI_OPCODE_SEQ: in exec_instruction()
/external/mesa3d/src/gallium/include/pipe/
Dp_shader_tokens.h302 #define TGSI_OPCODE_SEQ 45 macro
/external/mesa3d/src/gallium/drivers/r300/
Dr300_tgsi_to_rc.c78 case TGSI_OPCODE_SEQ: return RC_OPCODE_SEQ; in translate_opcode()
/external/mesa3d/src/gallium/drivers/radeon/
Dradeon_setup_tgsi_llvm.c728 case TGSI_OPCODE_SEQ: pred = LLVMRealUEQ; break; in emit_cmp()
1157 bld_base->op_actions[TGSI_OPCODE_SEQ].emit = emit_cmp; in radeon_llvm_context_init()
/external/mesa3d/src/mesa/state_tracker/
Dst_mesa_to_tgsi.c631 return TGSI_OPCODE_SEQ; in translate_opcode()
Dst_glsl_to_tgsi.cpp613 if ((op == TGSI_OPCODE_SEQ || in try_emit_float_set()
1531 emit(ir, TGSI_OPCODE_SEQ, result_dst, op[0], op[1]); in visit()
1548 emit(ir, TGSI_OPCODE_SEQ, st_dst_reg(temp), op[0], op[1]); in visit()
1591 emit(ir, TGSI_OPCODE_SEQ, result_dst, op[0], op[1]); in visit()
/external/mesa3d/src/gallium/auxiliary/gallivm/
Dlp_bld_tgsi_aos.c694 case TGSI_OPCODE_SEQ: in lp_emit_instruction_aos()
Dlp_bld_tgsi_action.c1600 bld_base->op_actions[TGSI_OPCODE_SEQ].emit = seq_emit_cpu; in lp_set_default_actions_cpu()
/external/mesa3d/src/gallium/drivers/i915/
Di915_fpc_translate.c905 case TGSI_OPCODE_SEQ: in i915_translate_instruction()
/external/mesa3d/src/gallium/drivers/svga/
Dsvga_tgsi_insn.c2601 case TGSI_OPCODE_SEQ: in svga_emit_instruction()
3151 emit->info.opcode_count[TGSI_OPCODE_SEQ] >= 1 || in needs_to_create_zero()
/external/mesa3d/src/gallium/drivers/nv50/codegen/
Dnv50_ir_from_tgsi.cpp432 case TGSI_OPCODE_SEQ: in getSetCond()
1999 case TGSI_OPCODE_SEQ: in handleInstruction()
/external/mesa3d/src/gallium/drivers/nv30/
Dnvfx_vertprog.c653 case TGSI_OPCODE_SEQ: in nvfx_vertprog_parse_instruction()
Dnvfx_fragprog.c724 case TGSI_OPCODE_SEQ: in nvfx_fragprog_parse_instruction()
/external/mesa3d/src/gallium/drivers/r600/
Dr600_shader.c5288 {TGSI_OPCODE_SEQ, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETE, tgsi_op2},
5462 {TGSI_OPCODE_SEQ, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETE, tgsi_op2},
5636 {TGSI_OPCODE_SEQ, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_SETE, tgsi_op2},