Searched refs:UMLAL (Results 1 – 16 of 16) sorted by relevance
| /external/llvm/test/MC/ARM/ |
| D | mul-v4.s | 1 @ PR17647: MUL/MLA/SMLAL/UMLAL should be avalaibe to IAS for ARMv4 and higher
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| D | basic-arm-instructions.s | 3295 @ UMLAL
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| D | basic-thumb2-instructions.s | 3415 @ UMLAL
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.h | 165 UMLAL, // 64bit Unsigned Accumulate Multiply enumerator
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| D | ARMScheduleSwift.td | 291 (instregex "SMLALS", "UMLALS", "SMLAL", "UMLAL", "MLALBB", "SMLALBT",
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| D | ARMInstrInfo.td | 96 def ARMUmlal : SDNode<"ARMISD::UMLAL", SDT_ARM64bitmlal>;
3920 def UMLAL : AsMla1I64<0b0000101, (outs GPR:$RdLo, GPR:$RdHi),
3950 (UMLAL GPR:$RdLo, GPR:$RdHi, GPR:$Rn, GPR:$Rm, GPR:$RLo, GPR:$RHi,
5725 // MUL/UMLAL/SMLAL/UMULL/SMULL are available on all arches, but
5739 (UMLAL GPR:$RdLo, GPR:$RdHi, GPR:$Rn, GPR:$Rm, pred:$p, cc_out:$s)>,
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| D | ARMISelDAGToDAG.cpp | 2688 case ARMISD::UMLAL:{ in Select()
2700 ARM::UMLAL : ARM::UMLALv5, in Select()
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| D | ARMScheduleA9.td | 2501 (instregex "SMULL", "SMULLv5", "UMULL", "UMULLv5", "SMLAL$", "UMLAL",
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| D | ARMISelLowering.cpp | 1202 case ARMISD::UMLAL: return "ARMISD::UMLAL"; in getTargetNodeName()
8555 unsigned FinalOpc = (Opc == ISD::SMUL_LOHI) ? ARMISD::SMLAL : ARMISD::UMLAL; in AddCombineTo64bitMLAL()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64SchedCyclone.td | 522 (instregex "MLA","MLS","SMLAL","SMLSL","UMLAL","UMLSL",
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| D | AArch64InstrInfo.td | 3458 defm UMLAL : SIMDLongThreeVectorTiedBHS<1, 0b1000, "umlal",
3484 // Additional patterns for SMLAL/SMLSL and UMLAL/UMLSL
4564 defm UMLAL : SIMDVectorIndexedLongSDTied<1, 0b0010, "umlal",
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| /external/vixl/doc/ |
| D | supported-instructions.md | 4230 ### UMLAL ### subsection
4240 ### UMLAL ### subsection
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| /external/llvm/test/MC/Disassembler/ARM/ |
| D | thumb2.txt | 2428 # UMLAL
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| D | basic-arm-instructions.txt | 2288 # UMLAL
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| /external/valgrind/none/tests/arm/ |
| D | v6intARM.stdout.exp | 555 UMLAL
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| D | v6media.stdout.exp | 36 UMLAL
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