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Searched refs:VLIW5 (Results 1 – 5 of 5) sorted by relevance

/external/llvm/lib/Target/AMDGPU/
DR600Packetizer.cpp63 bool VLIW5; member in __anon18a263af0111::R600PacketizerList
156 VLIW5 = !MF.getSubtarget<AMDGPUSubtarget>().hasCaymanISA(); in R600PacketizerList()
239 assert (!isTransSlot || VLIW5); in isBundlableWithCurrentPMI()
245 !TII->isVectorOnly(MI) && VLIW5) { in isBundlableWithCurrentPMI()
DR700Instructions.td11 // - Available to R700 and newer VLIW4/VLIW5 GPUs
DR600MachineScheduler.h84 bool VLIW5; variable
DR600MachineScheduler.cpp32 VLIW5 = !ST.hasCaymanISA(); in initialize()
430 if (!TransSlotOccuped && VLIW5) { in pickAlu()
DEvergreenInstructions.td11 // - Available to Evergreen and newer VLIW4/VLIW5 GPUs