Searched refs:VREV32 (Results 1 – 5 of 5) sorted by relevance
| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.h | 153 VREV32, // reverse elements within 32-bit words enumerator
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| D | ARMScheduleSwift.td | 549 (instregex "VEXT", "VREV16", "VREV32", "VREV64")>;
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| D | ARMISelLowering.cpp | 1193 case ARMISD::VREV32: return "ARMISD::VREV32"; in getTargetNodeName()
4504 SDValue N0 = DAG.getNode(ARMISD::VREV32, DL, VT16Bit, Counts16); in lowerCTPOP32BitElements()
5859 return DAG.getNode(ARMISD::VREV32, dl, VT, OpLHS); in GeneratePerfectShuffle()
5984 return DAG.getNode(ARMISD::VREV32, dl, VT, V1); in LowerVECTOR_SHUFFLE()
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| D | ARMInstrNEON.td | 575 def NEONvrev32 : SDNode<"ARMISD::VREV32", SDTARMVSHUF>;
6284 // VREV32 : Vector Reverse elements within 32-bit words
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| /external/clang/include/clang/Basic/ |
| D | arm_neon.td | 781 def VREV32 : WOpInst<"vrev32", "dd", "csUcUsPcPsQcQsQUcQUsQPcQPs", OP_REV32>;
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