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Searched refs:Width1 (Results 1 – 2 of 2) sorted by relevance

/external/llvm/lib/Target/AMDGPU/
DR600ISelLowering.cpp998 SDValue Width1 = DAG.getConstant(VT.getSizeInBits() - 1, DL, VT); in LowerSHLParts() local
1000 SDValue CompShift = DAG.getNode(ISD::SUB, DL, VT, Width1, Shift); in LowerSHLParts()
1036 SDValue Width1 = DAG.getConstant(VT.getSizeInBits() - 1, DL, VT); in LowerSRXParts() local
1038 SDValue CompShift = DAG.getNode(ISD::SUB, DL, VT, Width1, Shift); in LowerSRXParts()
1053 SDValue HiBig = SRA ? DAG.getNode(ISD::SRA, DL, VT, Hi, Width1) : Zero; in LowerSRXParts()
DSIInstrInfo.cpp1190 unsigned Width1 = (*MIb->memoperands_begin())->getSize(); in checkInstOffsetsDoNotOverlap() local
1192 offsetsDoNotOverlap(Width0, Offset0, Width1, Offset1)) { in checkInstOffsetsDoNotOverlap()