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Searched refs:X111 (Results 1 – 2 of 2) sorted by relevance

/external/valgrind/VEX/priv/
Dhost_arm64_defs.c2636 #define X111 BITS4(0, 1,1,1) macro
2986 *p++ = X_3_6_2_16_5(X111, X100101, i, h[i], xD); in imm64_to_ireg()
3012 *p++ = X_3_6_2_16_5(X111, X100101, i, h[i], xD); in imm64_to_ireg_EXACTLY4()
3037 expected = X_3_6_2_16_5(X111, X100101, i, h[i], xD); in is_imm64_to_ireg_EXACTLY4()
3234 UInt instr = X_3_8_5_6_5_5(X111, isLoad ? X11000011 : X11000001, in do_load_or_store64()
3308 *p++ = X_3_8_5_6_5_5(is64 ? X111 : X011, in emit_ARM64Instr()
3365 X111, X100100, argR->ARM64riL.I13.bitN, in emit_ARM64Instr()
/external/guava/guava-tests/benchmark/com/google/common/base/
DEnumsBenchmark.java93 X97, X98, X99, X100, X101, X102, X103, X104, X105, X106, X107, X108, X109, X110, X111, X112, enumConstant