Home
last modified time | relevance | path

Searched refs:addhn2 (Results 1 – 17 of 17) sorted by relevance

/external/llvm/test/MC/AArch64/
Dneon-3vdiff.s377 addhn2 v0.16b, v1.8h, v2.8h
378 addhn2 v0.8h, v1.4s, v2.4s
379 addhn2 v0.4s, v1.2d, v2.2d
Darm64-advsimd.s40 addhn2.16b v0, v0, v0
42 addhn2.8h v0, v0, v0
44 addhn2.4s v0, v0, v0
47 ; CHECK: addhn2.16b v0, v0, v0 ; encoding: [0x00,0x40,0x20,0x4e]
49 ; CHECK: addhn2.8h v0, v0, v0 ; encoding: [0x00,0x40,0x60,0x4e]
51 ; CHECK: addhn2.4s v0, v0, v0 ; encoding: [0x00,0x40,0xa0,0x4e]
Dneon-diagnostics.s2777 addhn2 v0.16b, v1.8h, v2.8b
2778 addhn2 v0.8h, v1.4s, v2.4h
2779 addhn2 v0.4s, v1.2d, v2.2s
/external/llvm/test/CodeGen/AArch64/
Darm64-vecFold.ll56 ; CHECK-NEXT: addhn2.8h v0, v2, v3
128 ; CHECK-NEXT: addhn2.8h v0, v2, v3
Darm64-vadd.ll33 ;CHECK-NEXT: addhn2.16b
43 ;CHECK-NEXT: addhn2.8h
53 ;CHECK-NEXT: addhn2.4s
840 ;CHECK: addhn2.16b
852 ;CHECK: addhn2.8h
864 ;CHECK: addhn2.4s
Darm64-neon-3vdiff.ll607 ; CHECK: addhn2 {{v[0-9]+}}.16b, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
621 ; CHECK: addhn2 {{v[0-9]+}}.8h, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
635 ; CHECK: addhn2 {{v[0-9]+}}.4s, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d
649 ; CHECK: addhn2 {{v[0-9]+}}.16b, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
663 ; CHECK: addhn2 {{v[0-9]+}}.8h, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
677 ; CHECK: addhn2 {{v[0-9]+}}.4s, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d
/external/llvm/test/MC/Disassembler/AArch64/
Darm64-advsimd.txt45 # CHECK: addhn2.16b v0, v0, v0
47 # CHECK: addhn2.8h v0, v0, v0
49 # CHECK: addhn2.4s v0, v0, v0
Dneon-instructions.txt1437 # CHECK: addhn2 v0.16b, v1.8h, v2.8h
1438 # CHECK: addhn2 v0.8h, v1.4s, v2.4s
1439 # CHECK: addhn2 v0.4s, v1.2d, v2.2d
/external/valgrind/none/tests/arm64/
Dfp_and_simd.c2717 GEN_BINARY_TEST(addhn2, 4s, 2d, 2d)
2719 GEN_BINARY_TEST(addhn2, 8h, 4s, 4s)
2721 GEN_BINARY_TEST(addhn2, 16b, 8h, 8h)
Dfp_and_simd.stdout.exp26948 addhn2 v9.4s, v7.2d, v8.2d c764295abed1d04fb3322434fdec1993 bc633cfd0d28a9c3618535947bfafc3e 83c…
26950 addhn2 v9.8h, v7.4s, v8.4s 289b70b68526d1f323181d834e49a469 8412b36397676176b21c8e2b52e37589 aca…
26952 addhn2 v9.16b, v7.8h, v8.8h 49f196aac21be59c5616337bcaafaf46 228db0df4c1471cc1eb9e9284ae2f3b8 6c…
/external/vixl/src/vixl/a64/
Dsimulator-a64.h2153 V(addhn2) \
Dmacro-assembler-a64.h2113 V(addhn2, Addhn2) \
Dassembler-a64.h3562 void addhn2(const VRegister& vd,
Dsimulator-a64.cc2744 case NEON_ADDHN2: addhn2(vf, rd, rn, rm); break; in VisitNEON3Different()
Dlogic-a64.cc3318 LogicVRegister Simulator::addhn2(VectorFormat vform, in addhn2() function in vixl::Simulator
Dassembler-a64.cc2444 V(addhn2, NEON_ADDHN2, vd.IsQ()) \
/external/vixl/doc/
Dsupported-instructions.md1450 void addhn2(const VRegister& vd,