| /external/valgrind/VEX/priv/ |
| D | host_tilegx_defs.h | 416 TILEGXAMode* amPC; /* amode in guest state for PC */ member
425 TILEGXAMode* amPC; member
433 TILEGXAMode* amPC; member
503 extern TILEGXInstr *TILEGXInstr_XDirect ( Addr64 dstGA, TILEGXAMode* amPC,
505 extern TILEGXInstr *TILEGXInstr_XIndir ( HReg dstGA, TILEGXAMode* amPC,
507 extern TILEGXInstr *TILEGXInstr_XAssisted ( HReg dstGA, TILEGXAMode* amPC,
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| D | host_tilegx_defs.c | 297 ppTILEGXAMode(instr->GXin.XDirect.amPC); in ppTILEGXInstr()
307 ppTILEGXAMode(instr->GXin.XIndir.amPC); in ppTILEGXInstr()
317 ppTILEGXAMode(instr->GXin.XAssisted.amPC); in ppTILEGXInstr()
832 TILEGXInstr *TILEGXInstr_XDirect ( Addr64 dstGA, TILEGXAMode* amPC, in TILEGXInstr_XDirect() argument
838 i->GXin.XDirect.amPC = amPC; in TILEGXInstr_XDirect()
844 TILEGXInstr *TILEGXInstr_XIndir ( HReg dstGA, TILEGXAMode* amPC, in TILEGXInstr_XIndir() argument
850 i->GXin.XIndir.amPC = amPC; in TILEGXInstr_XIndir()
855 TILEGXInstr *TILEGXInstr_XAssisted ( HReg dstGA, TILEGXAMode* amPC, in TILEGXInstr_XAssisted() argument
861 i->GXin.XAssisted.amPC = amPC; in TILEGXInstr_XAssisted()
1034 addRegUsage_TILEGXAMode(u, i->GXin.XDirect.amPC); in getRegUsage_TILEGXInstr()
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| D | host_mips_defs.h | 459 MIPSAMode* amPC; /* amode in guest state for PC */ member
467 MIPSAMode* amPC; member
474 MIPSAMode* amPC; member
638 extern MIPSInstr *MIPSInstr_XDirect ( Addr64 dstGA, MIPSAMode* amPC,
640 extern MIPSInstr *MIPSInstr_XIndir(HReg dstGA, MIPSAMode* amPC,
642 extern MIPSInstr *MIPSInstr_XAssisted(HReg dstGA, MIPSAMode* amPC,
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| D | host_arm64_defs.h | 608 ARM64AMode* amPC; /* amode in guest state for PC */ member
616 ARM64AMode* amPC; member
623 ARM64AMode* amPC; member
895 extern ARM64Instr* ARM64Instr_XDirect ( Addr64 dstGA, ARM64AMode* amPC,
897 extern ARM64Instr* ARM64Instr_XIndir ( HReg dstGA, ARM64AMode* amPC,
899 extern ARM64Instr* ARM64Instr_XAssisted ( HReg dstGA, ARM64AMode* amPC,
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| D | host_tilegx_isel.c | 1605 TILEGXAMode* amPC = TILEGXAMode_IR(stmt->Ist.Exit.offsIP, in iselStmt() local
1622 amPC, cc, toFastEP)); in iselStmt()
1628 addInstr(env, TILEGXInstr_XAssisted(r, amPC, cc, Ijk_Boring)); in iselStmt()
1651 addInstr(env, TILEGXInstr_XAssisted(r, amPC, cc, in iselStmt()
1694 TILEGXAMode* amPC = TILEGXAMode_IR(offsIP, TILEGXGuestStatePointer()); in iselNext() local
1703 amPC, TILEGXcc_AL, toFastEP)); in iselNext()
1709 addInstr(env, TILEGXInstr_XAssisted(r, amPC, TILEGXcc_AL, in iselNext()
1720 TILEGXAMode* amPC = TILEGXAMode_IR(offsIP, in iselNext() local
1723 addInstr(env, TILEGXInstr_XIndir(r, amPC, TILEGXcc_AL)); in iselNext()
1725 addInstr(env, TILEGXInstr_XAssisted(r, amPC, TILEGXcc_AL, in iselNext()
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| D | host_mips_defs.c | 906 MIPSInstr *MIPSInstr_XDirect ( Addr64 dstGA, MIPSAMode* amPC, in MIPSInstr_XDirect() argument
911 i->Min.XDirect.amPC = amPC; in MIPSInstr_XDirect()
917 MIPSInstr *MIPSInstr_XIndir ( HReg dstGA, MIPSAMode* amPC, in MIPSInstr_XIndir() argument
922 i->Min.XIndir.amPC = amPC; in MIPSInstr_XIndir()
927 MIPSInstr *MIPSInstr_XAssisted ( HReg dstGA, MIPSAMode* amPC, in MIPSInstr_XAssisted() argument
932 i->Min.XAssisted.amPC = amPC; in MIPSInstr_XAssisted()
1323 ppMIPSAMode(i->Min.XDirect.amPC, mode64); in ppMIPSInstr()
1333 ppMIPSAMode(i->Min.XIndir.amPC, mode64); in ppMIPSInstr()
1343 ppMIPSAMode(i->Min.XAssisted.amPC, mode64); in ppMIPSInstr()
1687 addRegUsage_MIPSAMode(u, i->Min.XDirect.amPC); in getRegUsage_MIPSInstr()
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| D | host_arm64_defs.c | 920 ARM64Instr* ARM64Instr_XDirect ( Addr64 dstGA, ARM64AMode* amPC, in ARM64Instr_XDirect() argument
925 i->ARM64in.XDirect.amPC = amPC; in ARM64Instr_XDirect()
930 ARM64Instr* ARM64Instr_XIndir ( HReg dstGA, ARM64AMode* amPC, in ARM64Instr_XIndir() argument
935 i->ARM64in.XIndir.amPC = amPC; in ARM64Instr_XIndir()
939 ARM64Instr* ARM64Instr_XAssisted ( HReg dstGA, ARM64AMode* amPC, in ARM64Instr_XAssisted() argument
944 i->ARM64in.XAssisted.amPC = amPC; in ARM64Instr_XAssisted()
1476 ppARM64AMode(i->ARM64in.XDirect.amPC); in ppARM64Instr()
1488 ppARM64AMode(i->ARM64in.XIndir.amPC); in ppARM64Instr()
1499 ppARM64AMode(i->ARM64in.XAssisted.amPC); in ppARM64Instr()
1981 addRegUsage_ARM64AMode(u, i->ARM64in.XDirect.amPC); in getRegUsage_ARM64Instr()
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| D | host_arm64_isel.c | 3869 ARM64AMode* amPC in iselStmt() local
3882 amPC, cc, toFastEP)); in iselStmt()
3888 addInstr(env, ARM64Instr_XAssisted(r, amPC, cc, Ijk_Boring)); in iselStmt()
3905 addInstr(env, ARM64Instr_XAssisted(r, amPC, cc, in iselStmt()
3946 ARM64AMode* amPC = mk_baseblock_64bit_access_amode(offsIP); in iselNext() local
3955 amPC, ARM64cc_AL, in iselNext()
3962 addInstr(env, ARM64Instr_XAssisted(r, amPC, ARM64cc_AL, in iselNext()
3973 ARM64AMode* amPC = mk_baseblock_64bit_access_amode(offsIP); in iselNext() local
3975 addInstr(env, ARM64Instr_XIndir(r, amPC, ARM64cc_AL)); in iselNext()
3977 addInstr(env, ARM64Instr_XAssisted(r, amPC, ARM64cc_AL, in iselNext()
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| D | host_mips_isel.c | 3985 MIPSAMode* amPC = MIPSAMode_IR(stmt->Ist.Exit.offsIP, in iselStmt() local
4004 amPC, cc, toFastEP)); in iselStmt()
4010 addInstr(env, MIPSInstr_XAssisted(r, amPC, cc, Ijk_Boring)); in iselStmt()
4032 addInstr(env, MIPSInstr_XAssisted(r, amPC, cc, in iselStmt()
4075 MIPSAMode* amPC = MIPSAMode_IR(offsIP, GuestStatePointer(env->mode64)); in iselNext() local
4088 amPC, MIPScc_AL, toFastEP)); in iselNext()
4094 addInstr(env, MIPSInstr_XAssisted(r, amPC, MIPScc_AL, in iselNext()
4105 MIPSAMode* amPC = MIPSAMode_IR(offsIP, in iselNext() local
4108 addInstr(env, MIPSInstr_XIndir(r, amPC, MIPScc_AL)); in iselNext()
4110 addInstr(env, MIPSInstr_XAssisted(r, amPC, MIPScc_AL, in iselNext()
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