/external/llvm/test/CodeGen/Mips/ |
D | atomic.ll | 31 ; MICROMIPS: beqzc $[[R2]], $[[BB0]] 50 ; MICROMIPS: beqzc $[[R2]], $[[BB0]] 70 ; MICROMIPS: beqzc $[[R2]], $[[BB0]] 92 ; MICROMIPS: beqzc $[[R2]], $[[BB0]] 129 ; MICROMIPS: beqzc $[[R14]], $[[BB0]] 169 ; MICROMIPS: beqzc $[[R14]], $[[BB0]] 210 ; MICROMIPS: beqzc $[[R14]], $[[BB0]] 249 ; MICROMIPS: beqzc $[[R14]], $[[BB0]] 295 ; MICROMIPS: beqzc $[[R16]], $[[BB0]] 336 ; MICROMIPS: beqzc $[[R16]], $[[BB0]] [all …]
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D | micromips-atomic.ll | 17 ; CHECK: beqzc $[[R2]], $[[BB0]]
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/external/llvm/test/MC/Mips/mips32r6/ |
D | relocations.s | 17 # CHECK-FIXUP: beqzc $9, bar # encoding: [0xd9,0b001AAAAA,A,A] 63 beqzc $9, bar
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/external/llvm/test/MC/Mips/mips64r6/ |
D | relocations.s | 17 # CHECK-FIXUP: beqzc $9, bar # encoding: [0xd9,0b001AAAAA,A,A] 68 beqzc $9, bar
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/external/llvm/test/MC/Mips/ |
D | relocation.s | 171 beqzc $2, foo // RELOC: R_MIPS_PC21_S2 foo
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/external/v8/test/cctest/ |
D | test-disasm-mips.cc | 280 COMPARE_PC_REL_COMPACT(beqzc(a0, -1048576), in TEST() 282 COMPARE_PC_REL_COMPACT(beqzc(a0, -1), "d89fffff beqzc a0, -1", -1); in TEST() 283 COMPARE_PC_REL_COMPACT(beqzc(a0, 0), "d8800000 beqzc a0, 0", 0); in TEST() 284 COMPARE_PC_REL_COMPACT(beqzc(a0, 1), "d8800001 beqzc a0, 1", 1); in TEST() 285 COMPARE_PC_REL_COMPACT(beqzc(a0, 1048575), in TEST()
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D | test-disasm-mips64.cc | 936 COMPARE_PC_REL_COMPACT(beqzc(a0, 0), "d8800000 beqzc a0, 0", 0); in TEST() 937 COMPARE_PC_REL_COMPACT(beqzc(a0, 1048575), // 0x0fffff == 1048575. in TEST() 939 COMPARE_PC_REL_COMPACT(beqzc(a0, -1048576), // 0x100000 == -1048576. in TEST()
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D | test-assembler-mips.cc | 4880 __ beqzc(a0, offset); // BEQZC rs, offset in run_beqzc() local
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D | test-assembler-mips64.cc | 5250 __ beqzc(a0, offset); in run_beqzc() local
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/external/v8/src/mips/ |
D | assembler-mips.h | 668 void beqzc(Register rs, int32_t offset); 669 inline void beqzc(Register rs, Label* L) { in beqzc() function 670 beqzc(rs, shifted_branch_offset21(L)); in beqzc()
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D | macro-assembler-mips.cc | 2121 beqzc(rs, offset); in BranchShortHelperR6() 2297 beqzc(scratch, offset); in BranchShortHelperR6() 2350 beqzc(rs, offset); in BranchShortHelperR6()
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D | assembler-mips.cc | 1432 void Assembler::beqzc(Register rs, int32_t offset) { in beqzc() function in v8::internal::Assembler
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/external/v8/src/mips64/ |
D | assembler-mips64.h | 672 void beqzc(Register rs, int32_t offset); 673 inline void beqzc(Register rs, Label* L) { in beqzc() function 674 beqzc(rs, shifted_branch_offset21(L)); in beqzc()
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D | macro-assembler-mips64.cc | 2510 beqzc(rs, offset); in BranchShortHelperR6() 2686 beqzc(scratch, offset); in BranchShortHelperR6() 2739 beqzc(rs, offset); in BranchShortHelperR6()
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D | assembler-mips64.cc | 1462 void Assembler::beqzc(Register rs, int32_t offset) { in beqzc() function in v8::internal::Assembler
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/external/llvm/test/MC/Disassembler/Mips/micromips32r3/ |
D | valid.txt | 160 0x40 0xe9 0x02 0x9a # CHECK: beqzc $9, 1332
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D | valid-el.txt | 160 0xe9 0x40 0x9a 0x02 # CHECK: beqzc $9, 1332
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/external/llvm/test/MC/Disassembler/Mips/mips32r6/ |
D | valid-mips32r6-el.txt | 24 0x90 0x46 0xa0 0xd8 # CHECK: beqzc $5, 72256
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D | valid-mips32r6.txt | 166 0xd8 0xa0 0x46 0x90 # CHECK: beqzc $5, 72256
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/external/llvm/test/MC/Disassembler/Mips/mips64r6/ |
D | valid-mips64r6-el.txt | 22 0x90 0x46 0xa0 0xd8 # CHECK: beqzc $5, 72256
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D | valid-mips64r6.txt | 190 0xd8 0xa0 0x46 0x90 # CHECK: beqzc $5, 72256
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/external/llvm/lib/Target/Mips/ |
D | MipsSchedule.td | 43 def II_BCCZC : InstrItinClass; // beqzc, bnezc
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D | Mips32r6InstrInfo.td | 355 class BEQZC_DESC : CMP_CBR_EQNE_Z_DESC_BASE<"beqzc", brtarget21, GPR32Opnd>;
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D | MicroMipsInstrInfo.td | 664 def BEQZC_MM : CompactBranchMM<"beqzc", brtarget_mm, seteq, GPR32Opnd>,
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