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Searched refs:bic (Results 1 – 25 of 123) sorted by relevance

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/external/llvm/test/MC/AArch64/
Dneon-mov.s71 bic v0.2s, #1
72 bic v1.2s, #0
73 bic v0.2s, #1, lsl #8
74 bic v0.2s, #1, lsl #16
75 bic v0.2s, #1, lsl #24
76 bic v0.4s, #1
77 bic v0.4s, #1, lsl #8
78 bic v0.4s, #1, lsl #16
79 bic v0.4s, #1, lsl #24
80 bic v15.4h, #1
[all …]
Darm64-logical-encoding.s94 bic w1, w2, w3
95 bic x1, x2, x3
96 bic w1, w2, w3, lsl #3
97 bic x1, x2, x3, lsl #3
98 bic w1, w2, w3, lsr #3
99 bic x1, x2, x3, lsr #3
100 bic w1, w2, w3, asr #3
101 bic x1, x2, x3, asr #3
102 bic w1, w2, w3, ror #3
103 bic x1, x2, x3, ror #3
[all …]
Dalias-logicalimm.s6 bic x0, x1, #2
11 bic w0, w1, #2
/external/llvm/test/CodeGen/Thumb2/
Dthumb2-bic.ll37 ; CHECK: bic.w r0, r0, r1, lsl #5
46 ; CHECK: bic.w r0, r0, r1, lsr #6
55 ; CHECK: bic.w r0, r0, r1, asr #7
64 ; CHECK: bic.w r0, r0, r0, ror #8
79 ; CHECK: bic r0, r0, #187
88 ; CHECK: bic r0, r0, #11141290
96 ; CHECK: bic r0, r0, #-872363008
104 ; CHECK: bic r0, r0, #1114112
/external/llvm/test/CodeGen/MSP430/
Dinline-asm.ll6 call void asm sideeffect "bic\09$0,r2", "i"(i16 32) nounwind
11 call void asm sideeffect "bic\09$0,r2", "r"(i16 %a) nounwind
18 … call void asm sideeffect "bic\09$0,r2", "i"(i16* getelementptr(i16, i16* @foo, i32 1)) nounwind
24 call void asm sideeffect "bic\09$0,r2", "m"(i16 %fooval) nounwind
DInst16rm.ll30 define i16 @bic(i16 %a) nounwind {
31 ; CHECK-LABEL: bic:
32 ; CHECK: bic.w &foo, r15
DInst8rm.ll30 define i8 @bic(i8 %a) nounwind {
31 ; CHECK-LABEL: bic:
32 ; CHECK: bic.b &foo, r15
DInst16rr.ll32 define i16 @bic(i16 %a, i16 %b) nounwind {
33 ; CHECK-LABEL: bic:
34 ; CHECK: bic.w r14, r15
DInst8rr.ll32 define i8 @bic(i8 %a, i8 %b) nounwind {
33 ; CHECK-LABEL: bic:
34 ; CHECK: bic.b r14, r15
DInst16mr.ll40 define void @bic(i16 zeroext %m) nounwind {
41 ; CHECK-LABEL: bic:
42 ; CHECK: bic.w r15, &foo
DInst8mr.ll40 define void @bic(i8 zeroext %m) nounwind {
41 ; CHECK-LABEL: bic:
42 ; CHECK: bic.b r15, &foo
/external/llvm/test/MC/ARM/
Darm-arithmetic-aliases.s56 bic r2, r2, #6 label
57 bic r2, #6 label
58 bic r2, r2, r3 label
59 bic r2, r3 label
61 @ CHECK: bic r2, r2, #6 @ encoding: [0x06,0x20,0xc2,0xe3]
62 @ CHECK: bic r2, r2, #6 @ encoding: [0x06,0x20,0xc2,0xe3]
63 @ CHECK: bic r2, r2, r3 @ encoding: [0x03,0x20,0xc2,0xe1]
64 @ CHECK: bic r2, r2, r3 @ encoding: [0x03,0x20,0xc2,0xe1]
Dbasic-arm-instructions.s382 @ CHECK: bic r10, r1, #14 @ encoding: [0x0e,0xa0,0xc1,0xe3]
401 @ CHECK: bic r2, r3, #-2147483648 @ encoding: [0x02,0x21,0xc3,0xe3]
402 @ CHECK: bic sp, sp, #-2147483648 @ encoding: [0x02,0xd1,0xcd,0xe3]
403 @ CHECK: bic pc, pc, #-2147483648 @ encoding: [0x02,0xf1,0xcf,0xe3]
408 @ CHECK: bic r1, r1, #14 @ encoding: [0x0e,0x10,0xc1,0xe3]
487 bic r10, r1, #0xf
488 bic r10, r1, $0xf
489 bic r10, r1, 0xf
490 bic r10, r1, -0xf
491 bic r7, r8, #(0xff << 16)
[all …]
/external/llvm/test/CodeGen/AArch64/
Dneon-bitwise-instructions.ll83 ; CHECK: bic {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
91 ; CHECK: bic {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
183 ; CHECK: bic {{v[0-9]+}}.2s, #{{0x10|16}}
190 ; CHECK: bic {{v[0-9]+}}.2s, #{{0x10|16}}, lsl #8
197 ; CHECK: bic {{v[0-9]+}}.2s, #{{0x10|16}}, lsl #16
204 ; CHECK: bic {{v[0-9]+}}.2s, #{{0x10|16}}, lsl #24
211 ; CHECK: bic {{v[0-9]+}}.4s, #{{0x10|16}}
218 ; CHECK: bic {{v[0-9]+}}.4s, #{{0x10|16}}, lsl #8
225 ; CHECK: bic {{v[0-9]+}}.4s, #{{0x10|16}}, lsl #16
232 ; CHECK: bic {{v[0-9]+}}.4s, #{{0x10|16}}, lsl #24
[all …]
Dlogical_shifted_reg.ll14 ; First check basic and/bic/or/orn/eor/eon patterns with no shift
21 ; CHECK: bic {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}
46 ; CHECK: bic {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}, lsl #31
68 ; CHECK: bic {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}, asr #10
104 ; First check basic and/bic/or/orn/eor/eon patterns with no shift
111 ; CHECK: bic {{x[0-9]+}}, {{x[0-9]+}}, {{x[0-9]+}}
136 ; CHECK: bic {{x[0-9]+}}, {{x[0-9]+}}, {{x[0-9]+}}, lsl #63
158 ; CHECK: bic {{x[0-9]+}}, {{x[0-9]+}}, {{x[0-9]+}}, asr #10
Darm64-neon-v1i1-setcc.ll29 ; CHECK: bic v{{[0-9]+}}.8b, v{{[0-9]+}}.8b, v{{[0-9]+}}.8b
38 ; CHECK: bic v{{[0-9]+}}.8b, v{{[0-9]+}}.8b, v{{[0-9]+}}.8b
47 ; CHECK: bic v{{[0-9]+}}.8b, v{{[0-9]+}}.8b, v{{[0-9]+}}.8b
61 ; CHECK: bic v{{[0-9]+}}.8b, v{{[0-9]+}}.8b, v{{[0-9]+}}.8b
/external/llvm/test/CodeGen/ARM/
DbicZext.ll2 ; ModuleID = 'bic.c'
8 ; CHECK: {{bic[^#]*#3}}
16 ; CHECK: {{bic[^#]*#3}}
Dbic.ll9 ; CHECK: bic r0, r0, r1
17 ; CHECK: bic r0, r0, r1
/external/llvm/test/MC/Disassembler/AArch64/
Darm64-logical.txt104 # CHECK: bic w1, w2, w3
105 # CHECK: bic x1, x2, x3
106 # CHECK: bic w1, w2, w3, lsl #3
107 # CHECK: bic x1, x2, x3, lsl #3
108 # CHECK: bic w1, w2, w3, lsr #3
109 # CHECK: bic x1, x2, x3, lsr #3
110 # CHECK: bic w1, w2, w3, asr #3
111 # CHECK: bic x1, x2, x3, asr #3
112 # CHECK: bic w1, w2, w3, ror #3
113 # CHECK: bic x1, x2, x3, ror #3
/external/boringssl/linux-aarch64/crypto/sha/
Dsha512-armv8.S41 bic x19,x26,x24
66 bic x28,x25,x23
90 bic x19,x24,x22
115 bic x28,x23,x21
139 bic x19,x22,x20
164 bic x28,x21,x27
188 bic x19,x20,x26
213 bic x28,x27,x25
237 bic x19,x26,x24
262 bic x28,x25,x23
[all …]
Dsha256-armv8.S47 bic w19,w26,w24
72 bic w28,w25,w23
96 bic w19,w24,w22
121 bic w28,w23,w21
145 bic w19,w22,w20
170 bic w28,w21,w27
194 bic w19,w20,w26
219 bic w28,w27,w25
243 bic w19,w26,w24
268 bic w28,w25,w23
[all …]
/external/fio/engines/
Dbinject.c255 struct b_ioctl_cmd bic; in binject_unmap_dev() local
267 bic.minor = bf->minor; in binject_unmap_dev()
269 if (ioctl(fdb, B_IOCTL_DEL, &bic) < 0) in binject_unmap_dev()
278 struct b_ioctl_cmd bic; in binject_map_dev() local
287 bic.fd = fd; in binject_map_dev()
289 if (ioctl(fdb, B_IOCTL_ADD, &bic) < 0) { in binject_map_dev()
295 bf->minor = bic.minor; in binject_map_dev()
/external/compiler-rt/lib/builtins/arm/
Dsync_fetch_and_nand_8.S19 bic rD_LO, rN_LO, rM_LO ; \
20 bic rD_HI, rN_HI, rM_HI
Dbswapdi2.S33 bic r2, r2, #0xff0000
38 bic r0, r0, #0xff0000
/external/llvm/test/CodeGen/ARM/Windows/
Daapcs.ll4 ; and no bic is required.
15 ; CHECK-NOT: bic

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