| /external/google-breakpad/src/processor/ |
| D | contained_range_map_unittest.cc | 57 ContainedRangeMap<unsigned int, int> crm; in RunTests() local
61 ASSERT_TRUE (crm.StoreRange(10, 10, 1)); in RunTests()
62 ASSERT_FALSE(crm.StoreRange(10, 10, 2)); // exactly equal to 1 in RunTests()
63 ASSERT_FALSE(crm.StoreRange(11, 10, 3)); // begins inside 1 and extends up in RunTests()
64 ASSERT_FALSE(crm.StoreRange( 9, 10, 4)); // begins below 1 and ends inside in RunTests()
65 ASSERT_TRUE (crm.StoreRange(11, 9, 5)); // contained by existing in RunTests()
66 ASSERT_TRUE (crm.StoreRange(12, 7, 6)); in RunTests()
67 ASSERT_TRUE (crm.StoreRange( 9, 12, 7)); // contains existing in RunTests()
68 ASSERT_TRUE (crm.StoreRange( 9, 13, 8)); in RunTests()
69 ASSERT_TRUE (crm.StoreRange( 8, 14, 9)); in RunTests()
[all …]
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| /external/kernel-headers/original/uapi/asm-arm/asm/ |
| D | kvm.h | 128 #define __ARM_CP15_REG(op1,crn,crm,op2) \ argument
132 ARM_CP15_REG_SHIFT_MASK(crm, CRM) | \
137 #define __ARM_CP15_REG64(op1,crm) \ argument
138 (__ARM_CP15_REG(op1, 0, crm, 0) | KVM_REG_SIZE_U64)
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| /external/kernel-headers/original/uapi/asm-arm64/asm/ |
| D | kvm.h | 181 #define __ARM64_SYS_REG(op0,op1,crn,crm,op2) \ argument
186 ARM64_SYS_REG_SHIFT_MASK(crm, CRM) | \
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| /external/v8/src/arm/ |
| D | assembler-arm.h | 992 CRegister crd, CRegister crn, CRegister crm,
996 CRegister crd, CRegister crn, CRegister crm,
1000 Register rd, CRegister crn, CRegister crm,
1004 Register rd, CRegister crn, CRegister crm,
1008 Register rd, CRegister crn, CRegister crm,
1012 Register rd, CRegister crn, CRegister crm,
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| D | assembler-arm.cc | 2143 CRegister crm, in cdp() argument
2148 crd.code()*B12 | coproc*B8 | (opcode_2 & 7)*B5 | crm.code()); in cdp()
2156 CRegister crm, in cdp2() argument
2158 cdp(coproc, opcode_1, crd, crn, crm, opcode_2, kSpecialCondition); in cdp2()
2166 CRegister crm, in mcr() argument
2171 rd.code()*B12 | coproc*B8 | (opcode_2 & 7)*B5 | B4 | crm.code()); in mcr()
2179 CRegister crm, in mcr2() argument
2181 mcr(coproc, opcode_1, rd, crn, crm, opcode_2, kSpecialCondition); in mcr2()
2189 CRegister crm, in mrc() argument
2194 rd.code()*B12 | coproc*B8 | (opcode_2 & 7)*B5 | B4 | crm.code()); in mrc()
[all …]
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| /external/llvm/lib/Target/AArch64/Disassembler/ |
| D | AArch64Disassembler.cpp | 1515 uint64_t crm = fieldFromInstruction(insn, 8, 4); in DecodeSystemPStateInstruction() local
1520 pstate_field == AArch64PState::UAO) && crm > 1) in DecodeSystemPStateInstruction()
1524 Inst.addOperand(MCOperand::createImm(crm)); in DecodeSystemPStateInstruction()
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| /external/icu/icu4c/source/data/misc/ |
| D | likelySubtags.txt | 134 crm{"crm_Cans_CA"}
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| D | supplementalData.txt | 11501 crm{
24835 crm{
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| /external/vixl/src/vixl/a64/ |
| D | macro-assembler-a64.h | 1635 void Sys(int op1, int crn, int crm, int op2, const Register& rt = xzr) {
1638 sys(op1, crn, crm, op2, rt);
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| D | assembler-a64.cc | 1908 void Assembler::sys(int op1, int crn, int crm, int op2, const Register& rt) { in sys() argument
1909 Emit(SYS | ImmSysOp1(op1) | CRn(crn) | CRm(crm) | ImmSysOp2(op2) | Rt(rt)); in sys()
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| D | assembler-a64.h | 1977 void sys(int op1, int crn, int crm, int op2, const Register& rt = xzr);
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| /external/vixl/doc/ |
| D | supported-instructions.md | 1273 System instruction with pre-encoded op (op1:crn:crm:op2).
1282 void sys(int op1, int crn, int crm, int op2, const Register& rt = xzr)
|