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Searched refs:hasVRegLiveness (Results 1 – 3 of 3) sorted by relevance

/external/llvm/include/llvm/CodeGen/
DMachineScheduler.h275 virtual bool hasVRegLiveness() const { return false; } in hasVRegLiveness() function
401 bool hasVRegLiveness() const override { return true; } in hasVRegLiveness() function
/external/llvm/lib/Target/AMDGPU/
DR600MachineScheduler.cpp27 assert(dag->hasVRegLiveness() && "R600SchedStrategy needs vreg liveness"); in initialize()
/external/llvm/lib/CodeGen/
DMachineScheduler.cpp1631 assert(DAG->hasVRegLiveness() && "Expect VRegs with LiveIntervals"); in apply()
2438 assert(dag->hasVRegLiveness() && in initialize()
3173 assert(dag->hasVRegLiveness() && "ILPScheduler needs vreg liveness"); in initialize()
3371 const SchedDFSResult *DFS = DAG->hasVRegLiveness() ? in getNodeLabel()
3385 const SchedDFSResult *DFS = DAG->hasVRegLiveness() ? in getNodeAttributes()