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/external/v8/test/webkit/fast/js/
Dparser-syntax-check.js59 function invalid(_a, _type) function
79 invalid("(a");
80 invalid("a[5");
81 invalid("a[5 + 6");
82 invalid("a.");
83 invalid("()");
84 invalid("a.'l'");
86 invalid("new -a");
91 invalid("a-- ++");
92 invalid("(a:) --b");
[all …]
/external/llvm/test/MC/Disassembler/AArch64/
Dfullfp16-neon-neg.txt6 # CHECK: warning: invalid instruction encoding
8 # CHECK: warning: invalid instruction encoding
10 # CHECK: warning: invalid instruction encoding
12 # CHECK: warning: invalid instruction encoding
14 # CHECK: warning: invalid instruction encoding
16 # CHECK: warning: invalid instruction encoding
18 # CHECK: warning: invalid instruction encoding
20 # CHECK: warning: invalid instruction encoding
22 # CHECK: warning: invalid instruction encoding
24 # CHECK: warning: invalid instruction encoding
[all …]
Dfullfp16-neg.txt5 # CHECK: warning: invalid instruction encoding
7 # CHECK: warning: invalid instruction encoding
9 # CHECK: warning: invalid instruction encoding
11 # CHECK: warning: invalid instruction encoding
13 # CHECK: warning: invalid instruction encoding
15 # CHECK: warning: invalid instruction encoding
17 # CHECK: warning: invalid instruction encoding
19 # CHECK: warning: invalid instruction encoding
21 # CHECK: warning: invalid instruction encoding
23 # CHECK: warning: invalid instruction encoding
[all …]
/external/llvm/test/MC/Disassembler/ARM/
Dfullfp16-neon-arm-neg.txt3 # CHECK: warning: invalid instruction encoding
4 # CHECK: warning: invalid instruction encoding
8 # CHECK: warning: invalid instruction encoding
9 # CHECK: warning: invalid instruction encoding
13 # CHECK: warning: invalid instruction encoding
14 # CHECK: warning: invalid instruction encoding
18 # CHECK: warning: invalid instruction encoding
19 # CHECK: warning: invalid instruction encoding
23 # CHECK: warning: invalid instruction encoding
24 # CHECK: warning: invalid instruction encoding
[all …]
Dfullfp16-neon-thumb-neg.txt3 # CHECK: warning: invalid instruction encoding
4 # CHECK: warning: invalid instruction encoding
8 # CHECK: warning: invalid instruction encoding
9 # CHECK: warning: invalid instruction encoding
13 # CHECK: warning: invalid instruction encoding
14 # CHECK: warning: invalid instruction encoding
18 # CHECK: warning: invalid instruction encoding
19 # CHECK: warning: invalid instruction encoding
23 # CHECK: warning: invalid instruction encoding
24 # CHECK: warning: invalid instruction encoding
[all …]
Dinvalid-thumbv7.txt4 # This file is checking Thumbv7 encodings which are globally invalid, usually due
5 # to the constraints of the instructions not being met. For example invalid
22 # CHECK: warning: invalid instruction encoding
92 # invalid LDRSHs Rt=PC
94 # CHECK: invalid instruction encoding
97 # invalid LDRSHi8 Rt=PC
99 # CHECK: invalid instruction encoding
102 # invalid LDRSHi12 Rt=PC
104 # CHECK: invalid instruction encoding
115 # CHECK: invalid instruction encoding
[all …]
Dinvalid-thumbv8.txt10 # CHECK: invalid instruction encoding
15 # CHECK: invalid instruction encoding
20 # CHECK: invalid instruction encoding
25 # CHECK: invalid instruction encoding
30 # CHECK: invalid instruction encoding
35 # CHECK: invalid instruction encoding
40 # CHECK: invalid instruction encoding
45 # CHECK: invalid instruction encoding
50 # CHECK: invalid instruction encoding
55 # CHECK: invalid instruction encoding
[all …]
Dinvalid-armv8.txt10 # CHECK: invalid instruction encoding
15 # CHECK: invalid instruction encoding
20 # CHECK: invalid instruction encoding
25 # CHECK: invalid instruction encoding
30 # CHECK: invalid instruction encoding
35 # CHECK: invalid instruction encoding
40 # CHECK: invalid instruction encoding
45 # CHECK: invalid instruction encoding
50 # CHECK: invalid instruction encoding
55 # CHECK: invalid instruction encoding
[all …]
/external/llvm/test/MC/SystemZ/
Dinsn-bad-z196.s5 #CHECK: error: invalid operand
7 #CHECK: error: invalid operand
9 #CHECK: error: invalid operand
16 #CHECK: error: invalid operand
18 #CHECK: error: invalid operand
20 #CHECK: error: invalid operand
27 #CHECK: error: invalid operand
29 #CHECK: error: invalid operand
35 #CHECK: error: invalid operand
37 #CHECK: error: invalid operand
[all …]
Dinsn-bad-z13.s5 #CHECK: error: invalid operand
7 #CHECK: error: invalid operand
9 #CHECK: error: invalid operand
11 #CHECK: error: invalid operand
13 #CHECK: error: invalid use of vector addressing
22 #CHECK: error: invalid operand
24 #CHECK: error: invalid operand
26 #CHECK: error: invalid operand
28 #CHECK: error: invalid operand
36 #CHECK: error: invalid operand
[all …]
Dinsn-bad.s5 #CHECK: error: invalid operand
7 #CHECK: error: invalid operand
13 #CHECK: error: invalid operand
15 #CHECK: error: invalid operand
21 #CHECK: error: invalid operand
23 #CHECK: error: invalid operand
29 #CHECK: error: invalid operand
31 #CHECK: error: invalid operand
37 #CHECK: error: invalid operand
39 #CHECK: error: invalid operand
[all …]
Dregs-bad.s6 #CHECK: error: invalid operand for instruction
8 #CHECK: error: invalid operand for instruction
10 #CHECK: error: invalid operand for instruction
12 #CHECK: error: invalid operand for instruction
14 #CHECK: error: invalid operand for instruction
16 #CHECK: error: invalid operand for instruction
28 #CHECK: error: invalid operand for instruction
30 #CHECK: error: invalid operand for instruction
32 #CHECK: error: invalid operand for instruction
34 #CHECK: error: invalid operand for instruction
[all …]
Dtokens.s4 #CHECK: error: invalid instruction
8 #CHECK: error: invalid instruction
14 #CHECK: error: invalid instruction
16 #CHECK: error: invalid address register
22 #CHECK: error: invalid instruction
24 #CHECK: error: invalid instruction
26 #CHECK: error: invalid operand
32 #CHECK: error: invalid instruction
36 #CHECK: error: invalid instruction
38 #CHECK: error: invalid instruction
[all …]
/external/clang/test/SemaOpenCL/
Dinvalid-logical-ops-1.1.cl10 int flaf = 0.0f && 0.0f; // expected-error {{invalid operands}}
11 int flof = 0.0f || 0.0f; // expected-error {{invalid operands}}
12 float fbaf = 0.0f & 0.0f; // expected-error {{invalid operands}}
13 float fbof = 0.0f | 0.0f; // expected-error {{invalid operands}}
14 float fbxf = 0.0f ^ 0.0f; // expected-error {{invalid operands}}
15 int flai = 0.0f && 0; // expected-error {{invalid operands}}
16 int floi = 0.0f || 0; // expected-error {{invalid operands}}
17 float ibaf = 0 & 0.0f; // expected-error {{invalid operands}}
18 float ibof = 0 | 0.0f; // expected-error {{invalid operands}}
19 float bnf = ~0.0f; // expected-error {{invalid argument type}}
[all …]
Dinvalid-logical-ops-1.2.cl12 float fbaf = 0.0f & 0.0f; // expected-error {{invalid operands}}
13 float fbof = 0.0f | 0.0f; // expected-error {{invalid operands}}
14 float fbxf = 0.0f ^ 0.0f; // expected-error {{invalid operands}}
17 float ibaf = 0 & 0.0f; // expected-error {{invalid operands}}
18 float ibof = 0 | 0.0f; // expected-error {{invalid operands}}
19 float bnf = ~0.0f;// expected-error {{invalid argument type}}
27 float4 f4baf = f4 & 0.0f; // expected-error {{invalid operands}}
28 float4 f4bof = f4 | 0.0f; // expected-error {{invalid operands}}
29 float4 f4bxf = f4 ^ 0.0f; // expected-error {{invalid operands}}
30 float bnf4 = ~f4; // expected-error {{invalid argument type}}
[all …]
/external/llvm/test/MC/Mips/eva/
Dinvalid-noeva-wrong-error.s1 # invalid operand for instructions that are invalid without -mattr=+eva flag and
22 …cachee 31, 255($7) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruct…
23 …cachee 0, -256($4) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruct…
24 …cachee 5, -140($4) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruct…
25 …lbe $10,-256($25) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruct…
26 …lbe $13,255($15) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruct…
27 …lbe $11,146($14) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruct…
28 …lbue $13,-256($v1) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruct…
29 …lbue $13,255($v0) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruct…
30 …lbue $13,-190($v1) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruct…
[all …]
/external/llvm/test/MC/Disassembler/Mips/mips1/
Dinvalid.txt6 0x00 0x11 0x00 0x0f # CHECK: :[[@LINE]]:1: warning: invalid instruction encoding
7 0x00 0x30 0xc0 0x42 # CHECK: :[[@LINE]]:1: warning: invalid instruction encoding
8 0x00 0xab 0x09 0x4a # CHECK: :[[@LINE]]:1: warning: invalid instruction encoding
9 0x02 0x80 0x44 0xf0 # CHECK: :[[@LINE]]:1: warning: invalid instruction encoding
10 0x02 0xc5 0x40 0x01 # CHECK: :[[@LINE]]:1: warning: invalid instruction encoding
11 0x03 0x21 0x22 0xd5 # CHECK: :[[@LINE]]:1: warning: invalid instruction encoding
12 0x03 0xa0 0x08 0x13 # CHECK: :[[@LINE]]:1: warning: invalid instruction encoding
13 0x04 0x1c 0x63 0xee # CHECK: :[[@LINE]]:1: warning: invalid instruction encoding
14 0x40 0x3c 0x00 0x5d # CHECK: :[[@LINE]]:1: warning: invalid instruction encoding
15 0x42 0x02 0x00 0x27 # CHECK: :[[@LINE]]:1: warning: invalid instruction encoding
[all …]
/external/llvm/test/MC/Mips/micromips64r6/
Dinvalid.s6 addiur1sp $8, 240 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
7 addiur2 $9, $7, -1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
13 beqzc16 $9, 20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
16 bnezc16 $9, 20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
52 lbu16 $9, 8($16) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
55 lbu16 $16, 8($9) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
56 lhu16 $9, 4($16) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
59 lhu16 $16, 4($9) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
62 lw16 $9, 8($17) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
65 lw16 $17, 8($10) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
[all …]
/external/llvm/test/MC/Mips/micromips32r6/
Dinvalid.s6 addiur1sp $8, 240 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
7 addiur2 $9, $7, -1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
13 beqzc16 $9, 20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
16 bnezc16 $9, 20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
35 ei $32 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
36 swe $33, 8($4) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
37 swe $5, 8($34) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
38 swe $5, 512($4) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
39 lbu16 $9, 8($16) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
42 lbu16 $16, 8($9) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
[all …]
/external/llvm/test/MC/ARM/
Dinvalid-fp-armv8.s11 @ V8: error: invalid instruction
13 @ V8: error: invalid instruction
15 @ V8: error: invalid instruction
17 @ V8: error: invalid instruction
19 @ V8: error: invalid instruction
21 @ V8: error: invalid instruction
23 @ V8: error: invalid instruction
25 @ V8: error: invalid instruction
27 @ V8: error: invalid instruction
29 @ V8: error: invalid instruction
[all …]
Dinvalid-neon-v8.s4 @ CHECK: error: invalid operand for instruction
6 @ CHECK: error: invalid operand for instruction
13 @ CHECK: error: invalid operand for instruction
15 @ CHECK: error: invalid operand for instruction
20 @ CHECK: error: invalid operand for instruction
22 @ CHECK: error: invalid operand for instruction
24 @ CHECK: error: invalid operand for instruction
29 @ CHECK: error: invalid operand for instruction
31 @ CHECK: error: invalid operand for instruction
33 @ CHECK: error: invalid operand for instruction
[all …]
/external/llvm/test/MC/PowerPC/
Dppc64-errors.s9 # CHECK: error: invalid operand for instruction
13 # CHECK: error: invalid register name
19 # CHECK: error: invalid operand for instruction
23 # CHECK: error: invalid operand for instruction
29 # CHECK: error: invalid operand for instruction
33 # CHECK: error: invalid operand for instruction
39 # CHECK: error: invalid operand for instruction
43 # CHECK: error: invalid operand for instruction
49 # CHECK: error: invalid operand for instruction
52 # CHECK: error: invalid operand for instruction
[all …]
/external/llvm/test/MC/Mips/mips1/
Dinvalid-mips4-wrong-error.s1 # Instructions that are invalid and are correctly rejected but use the wrong
9 … bc1fl $fcc7,27 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
10 … bc1tl $fcc7,27 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
11 … ld $sp,-28645($s1) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
12 … ldc1 $f11,16391($s0) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
13 … ldc2 $8,-21181($at) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
14 … ldl $24,-4167($24) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
15 … ldr $14,-30358($s4) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
16 … ll $v0,-7321($s2) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
17 … lld $zero,-14736($ra) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
[all …]
Dinvalid-mips3-wrong-error.s1 # Instructions that are invalid and are correctly rejected but use the wrong
9 … ld $sp,-28645($s1) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
10 … ldc1 $f11,16391($s0) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
11 … ldc2 $8,-21181($at) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
12 … ldl $24,-4167($24) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
13 … ldr $14,-30358($s4) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
14 … ll $v0,-7321($s2) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
15 … lld $zero,-14736($ra) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
16 … lwu $s3,-24086($v1) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
17 … sc $15,18904($s3) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
[all …]
/external/llvm/test/MC/Mips/
Dmicromips-invalid.s6 addiur1sp $8, 240 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
9 addu16 $6, $14, $4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
10 subu16 $5, $16, $9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
11 andi16 $16, $10, 0x1f # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
13 and16 $16, $8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
14 not16 $18, $9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
15 or16 $16, $10 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
16 xor16 $15, $5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
17 sll16 $1, $16, 5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
18 srl16 $4, $9, 6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
[all …]

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