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Searched refs:isSGPRClass (Results 1 – 6 of 6) sorted by relevance

/external/llvm/lib/Target/AMDGPU/
DSIFixSGPRCopies.cpp154 return TRI.isSGPRClass(DstRC) && TRI.hasVGPRs(SrcRC); in isVGPRToSGPRCopy()
160 return TRI.isSGPRClass(SrcRC) && TRI.hasVGPRs(DstRC); in isSGPRToVGPRCopy()
183 if (!TRI->isSGPRClass(MRI.getRegClass(DstReg))) in foldVGPRCopyIntoRegSequence()
221 assert(TRI->isSGPRClass(SrcRC) && in foldVGPRCopyIntoRegSequence()
277 if (!TRI->isSGPRClass(MRI.getRegClass(Reg))) in runOnMachineFunction()
361 if (TRI->isSGPRClass(DstRC) && in runOnMachineFunction()
DSIRegisterInfo.h60 bool isSGPRClass(const TargetRegisterClass *RC) const { in isSGPRClass() function
66 return isSGPRClass(getRegClass(RCID)); in isSGPRClassID()
71 return isSGPRClass(MRI.getRegClass(Reg)); in isSGPRReg()
DSIInstrInfo.cpp496 return RI.isSGPRClass(DstRC) ? AMDGPU::S_MOV_B32 : AMDGPU::V_MOV_B32_e32; in getMovOpcode()
497 } else if (DstRC->getSize() == 8 && RI.isSGPRClass(DstRC)) { in getMovOpcode()
499 } else if (DstRC->getSize() == 8 && !RI.isSGPRClass(DstRC)) { in getMovOpcode()
558 if (RI.isSGPRClass(RC)) { in storeRegToStackSlot()
647 if (RI.isSGPRClass(RC)) { in loadRegFromStackSlot()
1070 (Src1->isReg() && RI.isSGPRClass(MRI->getRegClass(Src1->getReg())))) in FoldImmediate()
1074 (Src2->isReg() && RI.isSGPRClass(MRI->getRegClass(Src2->getReg())))) in FoldImmediate()
1131 (Src0->isReg() && RI.isSGPRClass(MRI->getRegClass(Src0->getReg())))) in FoldImmediate()
1135 (Src1->isReg() && RI.isSGPRClass(MRI->getRegClass(Src1->getReg())))) in FoldImmediate()
1410 return RI.isSGPRClass(MRI.getRegClass(MO.getReg())); in usesConstantBus()
[all …]
DSIFixSGPRLiveRanges.cpp134 if (TRI->isSGPRClass(MRI.getRegClass(Def))) { in runOnMachineFunction()
DSIRegisterInfo.cpp146 } else if (isSGPRClass(RC)) { in getRegPressureSetLimit()
473 if (isSGPRClass(RC)) { in getSubRegClass()
DSIInstrInfo.td355 if (RC && SIRI->isSGPRClass(RC))