| /external/llvm/test/MC/AArch64/ |
| D | arm64-elf-relocs.s | 170 ldrsw x3, [x4, #:lo12:sym]
180 ldrsw x3, [x4, #:dtprel_lo12_nc:sym]
191 ldrsw x3, [x4, :tprel_lo12_nc:sym]
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| D | arm64-tls-relocs.s | 143 ldrsw x21, [x20, #:tprel_lo12_nc:var]
267 ldrsw x21, [x20, #:dtprel_lo12_nc:var]
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| D | elf-reloc-ldrlit.s | 6 ldrsw x9, some_label
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| D | tls-relocs.s | 153 ldrsw x21, [x20, #:dtprel_lo12_nc:var]
355 ldrsw x21, [x20, #:tprel_lo12_nc:var]
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| D | arm64-memory.s | 25 ldrsw x9, [sp, #512]
60 ; CHECK: ldrsw x9, [sp, #512] ; encoding: [0xe9,0x03,0x82,0xb9]
444 ldrsw x9, foo
449 ; CHECK: ldrsw x9, foo ; encoding: [0bAAA01001,A,A,0x98]
613 ldrsw x3, [x10, #10]
614 ldrsw x4, [x11, #-1]
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| D | basic-a64-diagnostics.s | 1834 ldrsw w3, somewhere
1842 ldrsw x2, #1048576
2008 ldrsw x2, [x3], #256
2009 ldrsw x22, [x13], #-257
2191 ldrsw x2, [x3, #256]!
2192 ldrsw x22, [x13, #-257]!
2476 ldrsw x9, [x15, x4, sxtx #3]
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| D | basic-a64-instructions.s | 2220 ldrsw xzr, everywhere
2420 ldrsw x2, [x5,#4]
2421 ldrsw x23, [sp, #16380]
2463 ldrsw x15, [x5, #:lo12:sym]
2589 ldrsw x17, [x23, w9, sxtw]
2591 ldrsw x19, [x21, wzr, sxtw #2]
2719 ldrsw xzr, [x9], #255
2720 ldrsw x2, [x3], #1
2721 ldrsw x19, [x12], #-256
2875 ldrsw xzr, [x9, #255]!
[all …]
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| /external/llvm/test/CodeGen/AArch64/ |
| D | arm64-extend.ll | 8 ; CHECK: ldrsw x0, [x[[REG1]], w0, sxtw #2]
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| D | aarch64-fix-cortex-a53-835769.ll | 163 ; CHECK: ldrsw
167 ; CHECK-NOWORKAROUND: ldrsw
183 ; CHECK: ldrsw
187 ; CHECK-NOWORKAROUND: ldrsw
202 ; CHECK: ldrsw
205 ; CHECK-NOWORKAROUND: ldrsw
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| D | jump-table.ll | 28 ; CHECK-PIC: ldrsw [[DEST:x[0-9]+]], [x[[JT]], {{x[0-9]+}}, lsl #2]
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| D | fast-isel-int-ext2.ll | 277 ; CHECK: ldrsw x0, [x0, x1]
427 ; CHECK: ldrsw x0, [x0, w1, sxtw]
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| D | fast-isel-int-ext.ll | 362 ; CHECK: ldrsw x0, [x0, x1]
482 ; CHECK: ldrsw x0, [x0, w1, sxtw]
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| D | arm64-register-offset-addressing.ll | 95 ; CHECK: ldrsw {{x[0-9]+}}, [{{x[0-9]+}}, {{w[0-9]+}}, sxtw]
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| D | arm64-collect-loh.ll | 81 ; CHECK-NEXT: ldrsw x0, {{\[}}[[LDRGOT_REG]]]
158 ; CHECK-NEXT: ldrsw x0, {{\[}}[[ADDGOT_REG]], #16]
228 ; CHECK-NEXT: ldrsw x0, {{\[}}[[ADRP_REG]], _InternalC@PAGEOFF]
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| D | ldst-unsignedimm.ll | 141 ; CHECK: ldrsw {{x[0-9]+}}, [{{x[0-9]+}}, {{#?}}:lo12:var_32bit]
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| D | arm64-fast-isel-conversion.ll | 112 ; CHECK: ldrsw x3, [sp, #8]
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| D | ldst-regoffset.ll | 124 ; CHECK: ldrsw {{x[0-9]+}}, [{{x[0-9]+}}, {{[xw][0-9]+}}, sxtw]
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| D | arm64-indexed-memory.ll | 332 ; CHECK: ldrsw x[[REG:[0-9]+]], [x0, #4]!
|
| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | arm64-memory.txt | 28 # CHECK: ldrsw x0, [x1, x0, lsl #2]
35 # CHECK: ldrsw x9, [sp, #512]
544 # CHECK: ldrsw x0, [x1, x0, lsl #2]
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| D | basic-a64-instructions.txt | 1897 # CHECK: ldrsw xzr, #-4
2138 # CHECK: ldrsw xzr, [x9], #255
2139 # CHECK: ldrsw x2, [x3], #1
2140 # CHECK: ldrsw x19, [x12], #-256
2296 # CHECK: ldrsw xzr, [x9, #255]!
2297 # CHECK: ldrsw x2, [x3, #1]!
2298 # CHECK: ldrsw x19, [x12, #-256]!
2441 # CHECK: ldrsw x2, [x5, #4]
2442 # CHECK: ldrsw x23, [sp, #16380]
2583 # CHECK: ldrsw x17, [x23, w9, sxtw]
[all …]
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| /external/vixl/doc/ |
| D | changelog.md | 50 + Support `ldrsw` for literals.
|
| D | supported-instructions.md | 652 void ldrsw(const Register& rt, RawLiteral* literal)
659 void ldrsw(const Register& rt, int imm19)
666 void ldrsw(const Register& rt, const MemOperand& src,
|
| /external/v8/test/cctest/ |
| D | test-disasm-arm64.cc | 896 COMPARE(ldrsw(x0, MemOperand(x1)), "ldrsw x0, [x1]"); in TEST_()
897 COMPARE(ldrsw(x2, MemOperand(x3, 8)), "ldrsw x2, [x3, #8]"); in TEST_()
898 COMPARE(ldrsw(x4, MemOperand(x5, 42, PreIndex)), "ldrsw x4, [x5, #42]!"); in TEST_()
899 COMPARE(ldrsw(x6, MemOperand(x7, -11, PostIndex)), "ldrsw x6, [x7], #-11"); in TEST_()
1137 COMPARE(ldrsw(x14, MemOperand(x15, -8)), "ldursw x14, [x15, #-8]"); in TEST_()
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| /external/vixl/test/ |
| D | test-disasm-a64.cc | 1011 COMPARE(ldrsw(x0, MemOperand(x1)), "ldrsw x0, [x1]"); in TEST()
1012 COMPARE(ldrsw(x2, MemOperand(x3, 8)), "ldrsw x2, [x3, #8]"); in TEST()
1013 COMPARE(ldrsw(x4, MemOperand(x5, 42, PreIndex)), "ldrsw x4, [x5, #42]!"); in TEST()
1014 COMPARE(ldrsw(x6, MemOperand(x7, -11, PostIndex)), "ldrsw x6, [x7], #-11"); in TEST()
1483 COMPARE(ldrsw(x14, MemOperand(x15, -8)), "ldursw x14, [x15, #-8]"); in TEST()
1580 COMPARE(ldrsw(x14, MemOperand(x15, -8), option), "ldursw x14, [x15, #-8]"); in TEST()
1902 COMPARE_PREFIX(ldrsw(x24, 0), "ldrsw x24, pc+0"); in TEST()
1903 COMPARE_PREFIX(ldrsw(x24, 1), "ldrsw x24, pc+4"); in TEST()
1904 COMPARE_PREFIX(ldrsw(x24, -1), "ldrsw x24, pc-4"); in TEST()
1905 COMPARE_PREFIX(ldrsw(x24, 0x3ffff), "ldrsw x24, pc+1048572"); in TEST()
[all …]
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| /external/vixl/src/vixl/a64/ |
| D | assembler-a64.h | 1748 void ldrsw(const Register& rt, const MemOperand& src,
1834 void ldrsw(const Register& rt, RawLiteral* literal);
1840 void ldrsw(const Register& rt, int imm19);
|