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Searched refs:opc2 (Results 1 – 14 of 14) sorted by relevance

/external/valgrind/VEX/priv/
Dhost_ppc_defs.c3138 UInt imm1, UInt imm2, UInt opc2, in mkFormMD() argument
3147 vassert(opc2 < 0x08); in mkFormMD()
3151 (opc2<<2) | ((imm1 >> 5)<<1)); in mkFormMD()
3156 UInt r3, UInt opc2, UInt b0, VexEndness endness_host ) in mkFormX() argument
3163 vassert(opc2 < 0x400); in mkFormX()
3166 (r3<<11) | (opc2<<1) | (b0)); in mkFormX()
3171 UInt r3, UInt b10, UInt opc2, UInt b0, in mkFormXO() argument
3180 vassert(opc2 < 0x200); in mkFormXO()
3183 (r3<<11) | (b10 << 10) | (opc2<<1) | (b0)); in mkFormXO()
3188 UInt f3, UInt opc2, UInt b0, VexEndness endness_host ) in mkFormXL() argument
[all …]
Dguest_ppc_toIR.c3481 UInt opc2 = ifieldOPClo9(theInstr); in dis_int_arith() local
3569 switch (opc2) { in dis_int_arith()
4119 UInt opc2 = ifieldOPClo10(theInstr); in dis_int_cmp() local
4172 switch (opc2) { in dis_int_cmp()
4237 UInt opc2 = ifieldOPClo10(theInstr); in dis_int_logic() local
4295 switch (opc2) { in dis_int_logic()
4614 UInt opc2 = ifieldOPClo10(theInstr); in dis_int_parity() local
4647 switch (opc2) { in dis_int_parity()
4747 UChar opc2 = toUChar( IFIELD( theInstr, 2, 3 ) ); in dis_int_rot() local
4879 switch (opc2) { in dis_int_rot()
[all …]
Dhost_arm_defs.c3835 UInt opc, opc1, opc2; in emit_ARMInstr() local
3889 opc2 = opc & 3; in emit_ARMInstr()
3892 BITS4(D,(opc2 >> 1),(opc2 & 1),1), X0000); in emit_ARMInstr()
3930 opc2 = opc & 3; in emit_ARMInstr()
3933 BITS4(M,(opc2 >> 1),(opc2 & 1),1), X0000); in emit_ARMInstr()
3978 opc2 = opc & 3; in emit_ARMInstr()
3981 BITS4(M,(opc2 >> 1),(opc2 & 1),1), X0000); in emit_ARMInstr()
Dhost_mips_defs.c2153 UInt sa, UInt opc2) in mkFormS() argument
2160 vassert(opc2 <= 0x3F); in mkFormS()
2164 ((sa & 0x1F) << 6) | (opc2)); in mkFormS()
Dguest_mips_toIR.c1537 UInt opc2 = get_function(theInstr); in dis_instr_shrt() local
1553 switch (opc2) { in dis_instr_shrt()
2237 UChar opc2 = get_function(theInstr); in dis_instr_CVM() local
2258 switch(opc2) { in dis_instr_CVM()
2631 switch(opc2) { in dis_instr_CVM()
/external/llvm/test/TableGen/
DBitsInit.td7 bits<2> opc2 = { 1, 0 };
9 bits<2> a = { opc, opc2 }; // error!
10 bits<2> b = { opc{0}, opc2{0} };
11 bits<2> c = { opc{1}, opc2{1} };
17 // CHECK: bits<2> opc2 = { 1, 0 };
/external/llvm/lib/Target/XCore/
DXCoreInstrInfo.td221 multiclass F3R_2RUS<bits<5> opc1, bits<5> opc2, string OpcStr, SDNode OpNode> {
225 def _2rus : _F2RUS<opc2, (outs GRRegs:$dst), (ins GRRegs:$b, i32imm:$c),
230 multiclass F3R_2RUS_np<bits<5> opc1, bits<5> opc2, string OpcStr> {
233 def _2rus : _F2RUS<opc2, (outs GRRegs:$dst), (ins GRRegs:$b, i32imm:$c),
237 multiclass F3R_2RBITP<bits<5> opc1, bits<5> opc2, string OpcStr,
242 def _2rus : _F2RUSBitp<opc2, (outs GRRegs:$dst), (ins GRRegs:$b, i32imm:$c),
258 multiclass FL3R_L2RUS<bits<9> opc1, bits<9> opc2, string OpcStr,
263 def _l2rus : _FL2RUS<opc2, (outs GRRegs:$dst), (ins GRRegs:$b, i32imm:$c),
269 multiclass FL3R_L2RBITP<bits<9> opc1, bits<9> opc2, string OpcStr,
274 def _l2rus : _FL2RUSBitp<opc2, (outs GRRegs:$dst), (ins GRRegs:$b, i32imm:$c),
/external/llvm/lib/Target/ARM/
DARMInstrInfo.td4789 c_imm:$CRd, c_imm:$CRn, c_imm:$CRm, imm0_7:$opc2),
4790 NoItinerary, "cdp", "\t$cop, $opc1, $CRd, $CRn, $CRm, $opc2",
4792 imm:$CRm, imm:$opc2)]>,
4798 bits<3> opc2;
4803 let Inst{7-5} = opc2;
4811 c_imm:$CRd, c_imm:$CRn, c_imm:$CRm, imm0_7:$opc2),
4812 NoItinerary, "cdp2\t$cop, $opc1, $CRd, $CRn, $CRm, $opc2",
4814 imm:$CRm, imm:$opc2)]>,
4821 bits<3> opc2;
4826 let Inst{7-5} = opc2;
[all …]
DARMInstrThumb2.td4126 : T2Cop<Op, oops, iops, opc, "\t$cop, $opc1, $Rt, $CRn, $CRm, $opc2",
4135 bits<3> opc2;
4142 let Inst{7-5} = opc2;
4171 c_imm:$CRm, imm0_7:$opc2),
4173 imm:$CRm, imm:$opc2)]>,
4180 c_imm:$CRm, imm0_7:$opc2),
4182 imm:$CRm, imm:$opc2)]> {
4192 c_imm:$CRm, imm0_7:$opc2), []>;
4199 c_imm:$CRm, imm0_7:$opc2), []> {
4206 def : T2v6Pat<(int_arm_mrc imm:$cop, imm:$opc1, imm:$CRn, imm:$CRm, imm:$opc2),
[all …]
/external/llvm/lib/Target/X86/
DX86InstrMMX.td113 multiclass MMXI_binop_rmi_int<bits<8> opc, bits<8> opc2, Format ImmForm,
127 def ri : MMXIi8<opc2, ImmForm, (outs VR64:$dst),
DX86InstrAVX512.td2435 multiclass avx512_mask_shiftop_w<bits<8> opc1, bits<8> opc2, string OpcodeStr,
2443 defm Q : avx512_mask_shiftop<opc2, !strconcat(OpcodeStr, "q"), VK64, OpNode>,
2446 defm D : avx512_mask_shiftop<opc2, !strconcat(OpcodeStr, "d"), VK32, OpNode>,
DX86InstrSSE.td3961 multiclass PDI_binop_rmi<bits<8> opc, bits<8> opc2, Format ImmForm,
3983 def ri : PDIi8<opc2, ImmForm, (outs RC:$dst),
/external/v8/src/arm/
Dassembler-arm.cc2875 int sz, opc2, op; in EncodeVCVT() local
2878 opc2 = IsSignedVFPType(dst_type) ? 0x5 : 0x4; in EncodeVCVT()
2883 opc2 = 0x0; in EncodeVCVT()
2888 return (cond | 0xE*B24 | B23 | D*B22 | 0x3*B20 | B19 | opc2*B16 | in EncodeVCVT()
/external/llvm/lib/Target/Hexagon/
DHexagonInstrInfo.td5174 class T_shift_imm_acc_r <string opc1, string opc2, SDNode OpNode1,
5178 "$Rx "#opc2#opc1#"($Rs, #$u5)",
5204 class T_shift_reg_acc_r <string opc1, string opc2, SDNode OpNode1,
5208 "$Rx "#opc2#opc1#"($Rs, $Rt)",
5231 class T_shift_imm_acc_p <string opc1, string opc2, SDNode OpNode1,
5235 "$Rxx "#opc2#opc1#"($Rss, #$u6)",
5261 class T_shift_reg_acc_p <string opc1, string opc2, SDNode OpNode1,
5265 "$Rxx "#opc2#opc1#"($Rss, $Rt)",