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Searched refs:rsqrt (Results 1 – 25 of 32) sorted by relevance

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/external/llvm/test/CodeGen/X86/
Dextractps.ll12 … call <4 x float> @llvm.x86.sse.rsqrt.ss( <4 x float> %2 ) ; <<4 x float>>:3 [#uses=1]
20 … call <4 x float> @llvm.x86.sse.rsqrt.ss( <4 x float> %2 ) ; <<4 x float>>:3 [#uses=1]
26 declare <4 x float> @llvm.x86.sse.rsqrt.ss(<4 x float>) nounwind readnone
Dfold-load-unops.ll36 %res = tail call <4 x float> @llvm.x86.sse.rsqrt.ss(<4 x float> %ins)
77 declare <4 x float> @llvm.x86.sse.rsqrt.ss(<4 x float>) nounwind readnone
Dsse-scalar-fp-arith-unary.ll35 %y = tail call <4 x float> @llvm.x86.sse.rsqrt.ss(<4 x float> %x)
71 declare <4 x float> @llvm.x86.sse.rsqrt.ss(<4 x float>)
Dsse-intrinsics-x86.ll197 %res = call <4 x float> @llvm.x86.sse.rsqrt.ps(<4 x float> %a0) ; <<4 x float>> [#uses=1]
200 declare <4 x float> @llvm.x86.sse.rsqrt.ps(<4 x float>) nounwind readnone
205 %res = call <4 x float> @llvm.x86.sse.rsqrt.ss(<4 x float> %a0) ; <<4 x float>> [#uses=1]
208 declare <4 x float> @llvm.x86.sse.rsqrt.ss(<4 x float>) nounwind readnone
Dsse_partial_update.ll20 %0 = tail call <4 x float> @llvm.x86.sse.rsqrt.ss(<4 x float> %a) nounwind
29 declare <4 x float> @llvm.x86.sse.rsqrt.ss(<4 x float>) nounwind readnone
Dsse_reload_fold.ll12 declare <4 x float> @llvm.x86.sse.rsqrt.ps(<4 x float>)
41 %t = call <4 x float> @llvm.x86.sse.rsqrt.ps(<4 x float> %f)
/external/llvm/test/CodeGen/NVPTX/
Drsqrt.ll8 ; CHECK: rsqrt.approx.f32
/external/llvm/test/MC/Disassembler/Mips/mips4/
Dvalid-xfail-mips4.txt41 0x46 0x20 0xe0 0xd6 # CHECK: rsqrt.d $f3, $f28
42 0x46 0x00 0x41 0x16 # CHECK: rsqrt.s $f4, $f8
/external/skia/tests/
DMathTest.cpp384 static void test_rsqrt(skiatest::Reporter* reporter, RSqrtFn rsqrt) { in test_rsqrt() argument
391 float estimate = rsqrt(input); in test_rsqrt()
401 float estimate = rsqrt(input); in test_rsqrt()
411 float estimate = rsqrt(input); in test_rsqrt()
/external/clang/lib/Headers/
D__clang_cuda_runtime_wrapper.h155 static inline float rsqrt(float a) { return rsqrtf(a); } in rsqrt() function
/external/llvm/test/CodeGen/AMDGPU/
Dfsqrt.ll6 ; Run with unsafe-fp-math to make sure nothing tries to turn this into 1 / rsqrt(x)
Drsq.ll41 ; Recognize that this is rsqrt(a) * rcp(b) * c,
/external/llvm/test/MC/Disassembler/Mips/mips64r2/
Dvalid-xfail-mips64r2.txt73 0x46 0x20 0xe0 0x96 # CHECK: rsqrt.d $f2, $f28
74 0x46 0x00 0x41 0x16 # CHECK: rsqrt.s $f4, $f8
/external/llvm/test/MC/Disassembler/Mips/mips64r5/
Dvalid-xfail-mips64r5.txt73 0x46 0x20 0xe0 0x96 # CHECK: rsqrt.d $f2, $f28
74 0x46 0x00 0x41 0x16 # CHECK: rsqrt.s $f4, $f8
/external/llvm/test/MC/Disassembler/Mips/mips64r3/
Dvalid-xfail-mips64r3.txt73 0x46 0x20 0xe0 0x96 # CHECK: rsqrt.d $f2, $f28
74 0x46 0x00 0x41 0x16 # CHECK: rsqrt.s $f4, $f8
/external/llvm/test/MC/Mips/micromips32r6/
Dvalid.s188 rsqrt.s $f3, $f5 # CHECK: rsqrt.s $f3, $f5 # encoding: [0x54,0x65,0x02,0x3b]
189 rsqrt.d $f2, $f4 # CHECK: rsqrt.d $f2, $f4 # encoding: [0x54,0x44,0x42,0x3b]
/external/llvm/test/MC/Disassembler/Mips/mips64/
Dvalid-mips64-xfail.txt78 0x46 0x20 0xe0 0xd6 # CHECK: rsqrt.d $f3, $f28
79 0x46 0x00 0x41 0x16 # CHECK: rsqrt.s $f4, $f8
/external/llvm/test/MC/Disassembler/Mips/mips32r2/
Dvalid-xfail-mips32r2.txt78 0x46 0x20 0xe0 0x96 # CHECK: rsqrt.d $f2, $f28
79 0x46 0x00 0x41 0x16 # CHECK: rsqrt.s $f4, $f8
/external/llvm/test/MC/Disassembler/Mips/mips32r5/
Dvalid-xfail-mips32r5.txt78 0x46 0x20 0xe0 0x96 # CHECK: rsqrt.d $f2, $f28
79 0x46 0x00 0x41 0x16 # CHECK: rsqrt.s $f4, $f8
/external/llvm/test/MC/Disassembler/Mips/mips32r3/
Dvalid-xfail-mips32r3.txt78 0x46 0x20 0xe0 0x96 # CHECK: rsqrt.d $f2, $f28
79 0x46 0x00 0x41 0x16 # CHECK: rsqrt.s $f4, $f8
/external/llvm/test/MC/Disassembler/Mips/micromips64r6/
Dvalid.txt117 0x54 0x65 0x02 0x3b # CHECK: rsqrt.s $f3, $f5
118 0x54 0x44 0x42 0x3b # CHECK: rsqrt.d $f2, $f4
/external/llvm/test/MC/Disassembler/Mips/micromips32r6/
Dvalid.txt183 0x54 0x65 0x02 0x3b # CHECK: rsqrt.s $f3, $f5
184 0x54 0x44 0x42 0x3b # CHECK: rsqrt.d $f2, $f4
/external/llvm/test/CodeGen/PowerPC/
Drecipest.ll114 ; Recognize that this is rsqrt(a) * rcp(b) * c,
/external/llvm/lib/Target/Mips/
DMicroMips32r6InstrInfo.td126 class RSQRT_S_MMR6_ENC : POOL32F_MATH_FM_MMR6<"rsqrt.s", 0, 0b00001000>;
127 class RSQRT_D_MMR6_ENC : POOL32F_MATH_FM_MMR6<"rsqrt.d", 1, 0b00001000>;
747 class RSQRT_S_MMR6_DESC : ABSS_FT_MMR6_DESC_BASE<"rsqrt.s", FGR32Opnd,
749 class RSQRT_D_MMR6_DESC : ABSS_FT_MMR6_DESC_BASE<"rsqrt.d", FGR32Opnd,
/external/vulkan-validation-layers/libs/glm/detail/
Dintrinsic_common.inl300 // SSE scalar reciprocal sqrt using rsqrt op, plus one Newton-Rhaphson iteration

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