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Searched refs:s_dcache_inv (Results 1 – 3 of 3) sorted by relevance

/external/llvm/test/CodeGen/AMDGPU/
Dllvm.amdgcn.s.dcache.inv.ll8 ; SI-NEXT: s_dcache_inv ; encoding: [0x00,0x00,0xc0,0xc7]
9 ; VI-NEXT: s_dcache_inv ; encoding: [0x00,0x00,0x80,0xc0,0x00,0x00,0x00,0x00]
18 ; GCN-NEXT: s_dcache_inv
/external/llvm/test/MC/AMDGPU/
Dsmrd.s64 s_dcache_inv label
/external/llvm/lib/Target/AMDGPU/
DSIInstructions.td97 defm S_DCACHE_INV : SMRD_Inval <smrd<0x1f, 0x20>, "s_dcache_inv",