Searched refs:sgpr (Results 1 – 6 of 6) sorted by relevance
| /external/clang/test/Sema/ |
| D | inline-asm-validate-amdgpu.cl | 7 int sgpr = 0, vgpr = 0, imm = 0;
9 // sgpr constraints
10 __asm__ ("s_mov_b32 %0, %1" : "=s" (sgpr) : "s" (imm) : );
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| /external/llvm/test/CodeGen/AMDGPU/ |
| D | vop-shrink.ll | 11 define void @sub_rev(i32 addrspace(1)* %out, <4 x i32> %sgpr, i32 %cond) {
19 %tmp2 = extractelement <4 x i32> %sgpr, i32 1
24 %tmp3 = extractelement <4 x i32> %sgpr, i32 2
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| D | salu-to-valu.ll | 11 ; sgpr register pair and use that for the pointer operand
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| /external/mesa3d/src/gallium/drivers/radeonsi/ |
| D | radeonsi_shader.c | 150 unsigned sgpr) in use_sgpr() argument
156 sgpr_index = lp_build_const_int32(gallivm, sgpr); in use_sgpr()
160 assert(sgpr % 2 == 0); in use_sgpr()
170 assert(sgpr % 2 == 0); in use_sgpr()
175 assert(sgpr % 2 == 0); in use_sgpr()
182 assert(sgpr % 2 == 0); in use_sgpr()
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| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPU.td | 121 def FeatureSGPRInitBug : SubtargetFeature<"sgpr-init-bug",
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| D | SIInstructions.td | 2164 // case, the sgpr-copies pass will fix this to use the vector version.
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