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Searched refs:sqdmlsl (Results 1 – 20 of 20) sorted by relevance

/external/llvm/test/MC/AArch64/
Dneon-scalar-by-elem-saturating-mla.s25 sqdmlsl s1, h1, v1.h[0]
26 sqdmlsl s8, h2, v5.h[1]
27 sqdmlsl s12, h13, v14.h[2]
28 sqdmlsl s29, h28, v11.h[7]
29 sqdmlsl d1, s1, v13.s[0] define
30 sqdmlsl d31, s31, v31.s[2]
31 sqdmlsl d16, s18, v28.s[3]
Dneon-scalar-mul.s51 sqdmlsl s14, h12, h25
52 sqdmlsl d12, s23, s13
Dneon-2velem.s155 sqdmlsl v0.4s, v1.4h, v2.h[2]
156 sqdmlsl v0.2d, v1.2s, v2.s[2]
157 sqdmlsl v0.2d, v1.2s, v22.s[2]
Dneon-diagnostics.s2526 sqdmlsl v0.4s, v1.4s, v2.4h
2527 sqdmlsl v0.2d, v1.2d, v2.2s
2547 sqdmlsl v0.8h, v1.8b, v2.8b
3335 sqdmlsl v0.4h, v1.4h, v2.h[2]
3336 sqdmlsl v0.4s, v1.4h, v2.h[8]
3337 sqdmlsl v0.4s, v1.4h, v16.h[2]
3338 sqdmlsl v0.2s, v1.2s, v2.s[3]
3339 sqdmlsl v0.2d, v1.2s, v2.s[4]
3340 sqdmlsl v0.2d, v1.2s, v22.s[4]
4825 sqdmlsl s14, h12, s25
[all …]
Dneon-3vdiff.s257 sqdmlsl v0.4s, v1.4h, v2.4h
258 sqdmlsl v0.2d, v1.2s, v2.2s
Darm64-advsimd.s1144 sqdmlsl.h s0, h0, v0[7]
1162 ; CHECK: sqdmlsl.h s0, h0, v0[7] ; encoding: [0x00,0x78,0x70,0x5f]
1245 sqdmlsl.4s v0, v0, v0[0]
1247 sqdmlsl.2d v0, v0, v0[2]
1314 ; CHECK: sqdmlsl.4s v0, v0, v0[0] ; encoding: [0x00,0x70,0x40,0x0f]
1316 ; CHECK: sqdmlsl.2d v0, v0, v0[2] ; encoding: [0x00,0x78,0x80,0x0f]
/external/llvm/test/MC/Disassembler/AArch64/
Dneon-instructions.txt1336 # CHECK: sqdmlsl v0.4s, v1.4h, v2.4h
1337 # CHECK: sqdmlsl v0.2d, v1.2s, v2.2s
1770 # CHECK: sqdmlsl s14, h12, h25
1771 # CHECK: sqdmlsl d12, s23, s13
2369 # CHECK: sqdmlsl s0, h0, v0.h[0]
2370 # CHECK: sqdmlsl s0, h0, v0.h[1]
2371 # CHECK: sqdmlsl s0, h0, v0.h[2]
2372 # CHECK: sqdmlsl s0, h0, v0.h[3]
2373 # CHECK: sqdmlsl s0, h0, v0.h[4]
2374 # CHECK: sqdmlsl s0, h0, v0.h[5]
[all …]
Darm64-advsimd.txt1609 # CHECK: sqdmlsl.h s0, h0, v0[7]
1730 # CHECK: sqdmlsl.4s v0, v0, v0[0]
1732 # CHECK: sqdmlsl.2d v0, v0, v0[2]
2278 # CHECK: sqdmlsl s0, h0, h0
2279 # CHECK: sqdmlsl d0, s0, s0
/external/llvm/test/CodeGen/AArch64/
Darm64-vmul.ll353 ;CHECK: sqdmlsl.4s
364 ;CHECK: sqdmlsl.2d
1036 ;CHECK: sqdmlsl.4s
1059 ;CHECK: sqdmlsl.s
1124 ;CHECK: sqdmlsl.4s
1137 ;CHECK: sqdmlsl.2d
2007 ;CHECK: sqdmlsl
Darm64-neon-3vdiff.ll1709 ; CHECK: sqdmlsl {{v[0-9]+}}.4s, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
1718 ; CHECK: sqdmlsl {{v[0-9]+}}.2d, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
/external/vixl/test/
Dtest-simulator-a64.cc3836 DEFINE_TEST_NEON_3DIFF_LONG_SD(sqdmlsl, Basic)
3855 DEFINE_TEST_NEON_3DIFF_SCALAR_LONG_SD(sqdmlsl, Basic)
4064 DEFINE_TEST_NEON_BYELEMENT_DIFF(sqdmlsl, Basic, Basic, Basic)
4083 DEFINE_TEST_NEON_BYELEMENT_DIFF_SCALAR(sqdmlsl, Basic, Basic, Basic)
/external/vixl/src/vixl/a64/
Dsimulator-a64.cc2731 case NEON_SQDMLSL: sqdmlsl(vf_l, rd, rn, rm); break; in VisitNEON3Different()
2876 Op = &Simulator::sqdmlsl; in VisitNEONByIndexedElement()
3478 case NEON_SQDMLSL_scalar: sqdmlsl(vf, rd, rn, rm); break; in VisitNEONScalar3Diff()
3579 case NEON_SQDMLSL_byelement_scalar: Op = &Simulator::sqdmlsl; break; in VisitNEONScalarByIndexedElement()
Dsimulator-a64.h1584 LogicVRegister sqdmlsl(VectorFormat vform,
2184 V(sqdmlsl) \
Dmacro-assembler-a64.h2180 V(sqdmlsl, Sqdmlsl) \
2369 V(sqdmlsl, Sqdmlsl) \
Dassembler-a64.h2482 void sqdmlsl(const VRegister& vd,
3505 void sqdmlsl(const VRegister& vd,
Dlogic-a64.cc1059 LogicVRegister Simulator::sqdmlsl(VectorFormat vform, in sqdmlsl() function in vixl::Simulator
1067 return sqdmlsl(vform, dst, src1, dup_element(indexform, temp, src2, index)); in sqdmlsl()
3229 LogicVRegister Simulator::sqdmlsl(VectorFormat vform, in sqdmlsl() function in vixl::Simulator
Dassembler-a64.cc2426 V(sqdmlsl, NEON_SQDMLSL, vn.Is1H() || vn.Is1S() || vn.Is4H() || vn.Is2S()) \
3569 V(sqdmlsl, NEON_SQDMLSL_byelement, vn.IsScalar() || vn.IsD()) \ in NEON_FPBYELEMENT_LIST()
/external/valgrind/none/tests/arm64/
Dfp_and_simd.stdout.exp27976 sqdmlsl d31, s30, v29.s[0] ce682df82b1fad56fd9aa251cd5d38bb 4425ebe2dde927e1443a7b1c30760169 dd…
27977 sqdmlsl d31, s30, v29.s[3] 448d91a728b5d9bcbaeb0ae9fda82ff9 4fe77ed2ea2e272c52a2817274524332 35…
27978 sqdmlsl s31, h30, v13.h[1] 0e354ab4ee0e4cac5038836e2c9f5a41 c3da0b9c7705b49f8ef37e73ace83fe2 8e…
27979 sqdmlsl s31, h30, v13.h[5] 30f4bb90437e29584395f1d49d165b46 a592f5b549c2f16c7c4355121e0d982e ea…
27992 sqdmlsl v29.2d, v20.2s, v3.s[0] deb6e225bc78ba710e27b9c6f3f0d2fa b18f0ac4ec069fe93ff81f8a1b0e84…
27993 sqdmlsl v29.2d, v20.2s, v3.s[3] ef3fd5ab87b8398e208b6d78129c01fa d4062034743698037ea4c5835b6c04…
27996 sqdmlsl v29.4s, v20.4h, v3.h[0] 3e20297c87ffa2ed0d55f2b1ce1e8788 dcc6c2b4f0250f10f8da86033e5a9f…
27997 sqdmlsl v29.4s, v20.4h, v3.h[7] 6ec5bb034a5c8abd52ba39a7ba8cd43f 76110f1d49ab8856c13e583823b255…
28011 sqdmlsl d0, s8, s16 7556589b5f1cc8a92c8e22f19902bc58 523f7e21a501399934033724ccd3950a 37f707c7b…
28012 sqdmlsl s0, h8, h16 3cc680fc7b81a41c646fd3cb6a18822b e993d7f25dedbd309861290add7218c6 17ed223cf…
[all …]
/external/vixl/doc/
Dsupported-instructions.md3376 void sqdmlsl(const VRegister& vd,
3386 void sqdmlsl(const VRegister& vd,
/external/llvm/lib/Target/AArch64/
DAArch64InstrInfo.td3241 defm SQDMLSL : SIMDThreeScalarMixedTiedHS<0, 0b10110, "sqdmlsl">;
3444 defm SQDMLSL : SIMDLongThreeVectorSQDMLXTiedHS<0, 0b1011, "sqdmlsl",
4557 defm SQDMLSL : SIMDIndexedLongSQDMLXSDTied<0, 0b0111, "sqdmlsl",