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Searched refs:stm (Results 1 – 25 of 65) sorted by relevance

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/external/llvm/test/MC/ARM/
Darm-load-store-multiple-deprecated.s10 .global stm symbol
11 .type stm,%function
12 stm: label
13 stm sp!, {r0, pc}
15 @ CHECK: stm sp!, {r0, pc}
17 stm r0!, {r0, sp}
19 @ CHECK: stm r0!, {r0, sp}
21 stm r1!, {r0, sp, pc}
23 @ CHECK: stm r1!, {r0, sp, pc}
25 stm r2!, {sp, pc}
[all …]
Dthumb-load-store-multiple.s43 .global stm symbol
44 .type stm,%function
45 stm: label
46 stm r0!, {r1, sp}
48 stm r0!, {r2, pc}
50 stm r0!, {sp, pc}
Dthumb-diagnostics.s120 stm r1, {r2, r6}
121 stm r1!, {r2, r9}
122 stm r2!, {r2, r9}
124 stm r1!, {r2, sp}
129 @ CHECK-ERRORS: stm r1, {r2, r6}
132 @ CHECK-ERRORS: stm r1!, {r2, r9}
135 @ CHECK-ERRORS-V8: stm r2!, {r2, r9}
141 @ CHECK-ERRORS-V7M: stm r1!, {r2, sp}
Dbasic-thumb-instructions.s520 stm r1!, {r2, r6}
521 stm r1!, {r1, r2, r3, r7}
523 @ CHECK: stm r1!, {r2, r6} @ encoding: [0x44,0xc1]
524 @ CHECK: stm r1!, {r1, r2, r3, r7} @ encoding: [0x8e,0xc1]
/external/llvm/test/CodeGen/Thumb/
Dldm-stm-base-materialization.ll17 ; CHECK-NEXT: stm r[[NSB]]!, {r[[R1]], r[[R2]], r[[R3]]}
19 ; CHECK-NEXT: stm r[[NSB]]!, {r[[R1]], r[[R2]], r[[R3]]}
38 ; CHECK-NEXT: stm r[[NSB]]!, {r[[R1]], r[[R2]], r[[R3]]}
40 ; CHECK-NEXT: stm r[[NSB]]!, {r[[R1]], r[[R2]], r[[R3]], r[[R4]]}
59 ; CHECK-NEXT: stm r[[NSB]]!, {r[[R1]], r[[R2]], r[[R3]], r[[R4]]}
61 ; CHECK-NEXT: stm r[[NSB]]!, {r[[R1]], r[[R2]], r[[R3]], r[[R4]]}
80 ; CHECK-NEXT: stm r[[NSB]]!, {r[[R1]], r[[R2]], r[[R3]]}
82 ; CHECK-NEXT: stm r[[NSB]]!, {r[[R1]], r[[R2]], r[[R3]]}
84 ; CHECK-NEXT: stm r[[NSB]]!, {r[[R1]], r[[R2]], r[[R3]]}
Dldm-stm-base-materialization-thumb2.ll18 ; CHECK-NEXT: stm{{(\.w)?}} [[SB]], {[[R1]], [[R2]], [[R3]], [[R4]], [[R5]], [[R6]]}
37 ; CHECK-NEXT: stm{{(\.w)?}} [[SB]]!, {[[R1]], [[R2]], [[R3]]}
39 ; CHECK-NEXT: stm{{(\.w)?}} [[SB]], {[[R1]], [[R2]], [[R3]], [[R4]]}
58 ; CHECK-NEXT: stm{{(\.w)?}} [[SB]]!, {[[R1]], [[R2]], [[R3]], [[R4]]}
60 ; CHECK-NEXT: stm{{(\.w)?}} [[SB]], {[[R1]], [[R2]], [[R3]], [[R4]]}
79 ; CHECK-NEXT: stm{{(\.w)?}} [[SB]]!, {[[R1]], [[R2]], [[R3]], [[R4]]}
81 ; CHECK-NEXT: stm{{(\.w)?}} [[SB]], {[[R1]], [[R2]], [[R3]], [[R4]], [[R5]]}
Dstm-merge.ll13 ; CHECK: stm r[[BASE:[0-9]]]!, {{.*}}
/external/llvm/test/CodeGen/ARM/
Dmemcpy-ldm-stm.ll23 ; CHECK-NEXT: stm{{(\.w)?}} [[SB]]!,
40 ; CHECK-NEXT: stm{{(\.w)?}} [[SB]]!,
74 ; 3 ldm/stm pairs in v6; 2 in v7
76 ; CHECK: stm{{(\.w)?}} {{[rl0-9]+!?}}, [[REGLIST1]]
78 ; CHECK: stm{{(\.w)?}} {{[rl0-9]+!?}}, [[REGLIST2]]
80 ; CHECKV6: stm {{r[0-7]!?}}, [[REGLIST3]]
82 ; CHECKV7-NOT: stm
Dldm-stm-base-materialization.ll18 ; CHECK-NEXT: stm [[NSB]], {[[R1]], [[R2]], [[R3]], [[R4]], [[R5]], [[R6]]}
37 ; CHECK-NEXT: stm [[NSB]]!, {[[R1]], [[R2]], [[R3]]}
39 ; CHECK-NEXT: stm [[NSB]], {[[R1]], [[R2]], [[R3]], [[R4]]}
58 ; CHECK-NEXT: stm [[NSB]]!, {[[R1]], [[R2]], [[R3]], [[R4]]}
60 ; CHECK-NEXT: stm [[NSB]], {[[R1]], [[R2]], [[R3]], [[R4]]}
79 ; CHECK-NEXT: stm [[NSB]]!, {[[R1]], [[R2]], [[R3]], [[R4]]}
81 ; CHECK-NEXT: stm [[NSB]], {[[R1]], [[R2]], [[R3]], [[R4]], [[R5]]}
Dwrong-t2stmia-size-opt.ll21 ; Check that stm writes three registers. The bug caused one of registers (LR,
24 ; CHECK: stm{{[^,]*}}, {{{.*,.*,.*}}}
D2014-02-21-byval-reg-split-alignment.ll20 ; CHECK: stm [[SCRATCH]], {r1, r2, r3}
55 ; CHECK: stm [[SCRATCH]], {r0, r1, r2}
92 ; CHECK: stm [[SCRATCH]], {r0, r1, r2, r3}
Dload-store-flags.ll9 ; CHECK: stm [[NEWBASE]]!, {r0, r1, r2}
30 ; CHECK: stm [[NEWBASE]]!, {r0, r1, r2}
Dgpr-paired-spill.ll28 ; CHECK-WITHOUT-LDRD: stm [[ADDRREG]], {r{{[0-9]+}}, r{{[0-9]+}}}
29 ; CHECK-WITHOUT-LDRD: stm sp, {r{{[0-9]+}}, r{{[0-9]+}}}
Darm-modifier.ll49 ; CHECK: stm {{lr|r[0-9]+}}, {[[REG1:(r[0-9]+)]], r{{[0-9]+}}}
54 %0 = call i64 asm sideeffect "stm ${0:m}, ${1:M}\0A\09adds $3, $1\0A\09", "=*m,=r,1,r"(i64** @f3_pt…
D2013-05-13-AAPCS-byval-padding2.ll13 ;CHECK: stm r12, {r0, r1, r2, r3}
D2012-10-18-PR14099-ByvalFrameAddress.ll17 ; CHECK: stm r0, {r1, r2, r3}
D2013-05-13-AAPCS-byval-padding.ll20 ;CHECK: stm r0, {r1, r2, r3}
Dstm.ll12 ; CHECK: stm
Dvarargs-spill-stack-align-nacl.ll31 ; CHECK-NEXT: stm r0, {r1, r2, r3}
D2013-04-16-AAPCS-C5-vs-VFP.ll37 ;CHECK-NOT: stm
/external/boringssl/src/crypto/asn1/
Da_utctm.c282 struct tm stm, ttm; in ASN1_UTCTIME_cmp_time_t() local
285 if (!asn1_utctime_to_tm(&stm, s)) in ASN1_UTCTIME_cmp_time_t()
291 if (!OPENSSL_gmtime_diff(&day, &sec, &ttm, &stm)) in ASN1_UTCTIME_cmp_time_t()
/external/v8/src/arm/
Dmacro-assembler-arm.h320 stm(db_w, sp, src1.bit() | src2.bit(), cond);
332 stm(db_w, sp, src1.bit() | src2.bit() | src3.bit(), cond);
334 stm(db_w, sp, src1.bit() | src2.bit(), cond);
353 stm(db_w,
358 stm(db_w, sp, src1.bit() | src2.bit() | src3.bit(), cond);
362 stm(db_w, sp, src1.bit() | src2.bit(), cond);
379 stm(db_w, sp,
383 stm(db_w, sp, src1.bit() | src2.bit() | src3.bit() | src4.bit(),
388 stm(db_w, sp, src1.bit() | src2.bit() | src3.bit(), cond);
392 stm(db_w, sp, src1.bit() | src2.bit(), cond);
/external/curl/lib/
Dchecksrc.whitelist9 return fopen(file, "r", "rfm=stmlf", "ctx=stm");
/external/libvpx/libvpx/vp8/common/arm/armv6/
Dcopymem16x16_v6.asm148 ;stm r2, {r4-r5}
174 ;stm r2, {r4-r7}
/external/libunwind_llvm/src/
DUnwindRegistersSave.S304 stm r0, {r0-r7}
311 @ 32bit thumb-2 restrictions for stm:
314 stm r0, {r0-r12}

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