Searched refs:uops (Results 1 – 8 of 8) sorted by relevance
/external/llvm/lib/Target/ARM/ |
D | ARMScheduleA8.td | 155 [1, 1, 1, 1, 3], [], -1>, // dynamic uops 160 [2, 1, 1, 1, 3], [], -1>, // dynamic uops 166 [1, 2, 1, 1, 3], [], -1>, // dynamic uops 171 [1, 1, 3], [], -1>, // dynamic uops 177 [1, 1, 3], [], -1>, // dynamic uops 233 [], [], -1>, // dynamic uops 238 [2], [], -1>, // dynamic uops 400 [1, 1, 1, 2], [], -1>, // dynamic uops 408 [2, 1, 1, 1, 2], [], -1>, // dynamic uops 428 [1, 1, 1, 1], [], -1>, // dynamic uops [all …]
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D | ARMScheduleA9.td | 288 -1>, // dynamic uops 297 -1>, // dynamic uops 307 -1>, // dynamic uops 316 -1>, // dynamic uops 326 -1>, // dynamic uops 421 [], [], -1>, // dynamic uops 428 [2], [], -1>, // dynamic uops 726 [1, 1, 1, 1], [], -1>, // dynamic uops 736 [2, 1, 1, 1], [], -1>, // dynamic uops 764 [1, 1, 1, 1], [], -1>, // dynamic uops [all …]
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/external/llvm/test/Transforms/SLPVectorizer/ARM/ |
D | memory.ll | 5 ; On swift unaligned <2 x double> stores need 4uops and it is there for cheaper
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/external/llvm/include/llvm/Target/ |
D | TargetItinerary.td | 112 list<Bypass> bypasses = [], int uops = 1> { 114 int NumMicroOps = uops;
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/external/llvm/lib/Target/Hexagon/ |
D | HexagonMachineScheduler.cpp | 281 unsigned uops = SchedModel->getNumMicroOps(SU->getInstr()); in checkHazard() local 282 if (IssueCount + uops > SchedModel->getIssueWidth()) in checkHazard()
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/external/google-breakpad/src/third_party/libdisasm/ |
D | ia32_insn.h | 495 unsigned char uops; /* uops per insn */
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/external/llvm/lib/Target/Mips/ |
D | MipsScheduleP5600.td | 315 // These instructions are split across multiple uops (in different pipelines)
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/external/llvm/lib/CodeGen/ |
D | MachineScheduler.cpp | 1773 unsigned uops = SchedModel->getNumMicroOps(SU->getInstr()); in checkHazard() local 1774 if ((CurrMOps > 0) && (CurrMOps + uops > SchedModel->getIssueWidth())) { in checkHazard()
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