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Searched refs:FL (Results 1 – 3 of 3) sorted by relevance

/toolchain/binutils/binutils-2.25/gas/testsuite/gas/metag/
Dmetafpu21ext.s4 FL ABS FX.6,FX.4
15 FL MOV FX.6,FX.4
18 FL MOV FX.6,#0xf00
21 FL NEG FX.6,FX.4
23 FL SWAP FX.6,FX.0
26 FL CMP FX.6,FX.0
38 FL CMP FX.6,#0x0
41 FL MAX FX.2,FX.4,FX.6
44 FL MIN FX.2,FX.4,FX.6
47 FL FTOH FX.6,FX.0
[all …]
Dmetafpu21ext.d12 .*: f03100c0 FL ABS FX\.6,FX\.4
23 .*: f0310040 FL MOV FX\.6,FX\.4
26 .*: f0307805 FL MOV FX\.6,#0xf00
29 .*: f0310140 FL NEG FX\.6,FX\.4
31 .*: f03001c0 FL SWAP FX\.6,FX\.0
34 .*: f3018040 FL CMP FX\.6,FX\.0
46 .*: f3018140 FL CMP FX\.6,#0
49 .*: f3110cc1 FL MAX FX\.2,FX\.4,FX\.6
52 .*: f3110c41 FL MIN FX\.2,FX\.4,FX\.6
55 .*: f2300340 FL FTOH FX\.6,FX\.0
[all …]
/toolchain/binutils/binutils-2.25/include/opcode/
Di960.h113 #define FL OP( 0, LIT, FP, 0 ) macro
355 { R_3(0x677), "scaler", I_FP, REG, 3, { RL, FL, F } },
356 { R_3(0x680), "atanr", I_FP, REG, 3, { FL, FL, F } },
357 { R_3(0x681), "logepr", I_FP, REG, 3, { FL, FL, F } },
358 { R_3(0x682), "logr", I_FP, REG, 3, { FL, FL, F } },
359 { R_3(0x683), "remr", I_FP, REG, 3, { FL, FL, F } },
360 { R_2(0x684), "cmpor", I_FP, REG, 2, { FL, FL, 0 } },
361 { R_2(0x685), "cmpr", I_FP, REG, 2, { FL, FL, 0 } },
362 { R_2D(0x688), "sqrtr", I_FP, REG, 2, { FL, F, 0 } },
363 { R_2D(0x689), "expr", I_FP, REG, 2, { FL, F, 0 } },
[all …]