Searched refs:LB (Results 1 – 6 of 6) sorted by relevance
| /toolchain/binutils/binutils-2.25/gold/ |
| D | aarch64-reloc-property.cc | 106 #define ARD(rname, type, class, is_implemented, group_index, LB, UB, BSL, BSH, RFLAGS, inst) \ in AArch64_reloc_property_table() argument
118 rvalue_checkup<LB,UB>, \ in AArch64_reloc_property_table()
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| /toolchain/binutils/binutils-2.25/opcodes/ |
| D | ChangeLog-2009 | 544 * i386-dis.c: Document LB, LS and LV macros.
545 (dis386): Use mov%LB, mov%LS and mov%LV on mov instruction
547 (putop): Handle LB, LS and LV macros.
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| D | nds32-asm.c | 446 {"lb", "=rt,[%ra+(%rb<<%sv)]", MEM (LB), 4, ATTR_ALL, 0, NULL, 0, NULL},
447 {"lb", "=rt,[%ra+%rb{<<%sv}]", MEM (LB), 4, ATTR_ALL, 0, NULL, 0, NULL},
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| /toolchain/binutils/binutils-2.25/cpu/ |
| D | lm32.cpu | 240 ("LB" 4)
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| D | iq2000.cpu | 243 …("LB" 32) ("LH" 33) ("LW" 35) ("LBU" 36) ("LHU" 37) ("RAM" …
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| /toolchain/binutils/binutils-2.25/gas/testsuite/ |
| D | ChangeLog-2013 | 689 Allow the full 16-bit offset range to be used for SB, LB and LBU in
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