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/toolchain/binutils/binutils-2.25/gas/testsuite/gas/i860/
Dbitwise.s5 # Register forms (high variants do not have register forms).
54 # Immediate forms (all)
Dshift.s5 # Register forms (all)
54 # Immediate forms (shrd does not have an immediate form)
Diarith.s5 # Register forms
54 # Immediate forms (all)
/toolchain/binutils/binutils-2.25/
DCOPYING.NEWLIB27 Redistribution and use in source and binary forms, with or without modification,
179 Redistribution and use in source and binary forms, with or without
231 Redistribution and use in source and binary forms, with or without
263 Redistribution and use in source and binary forms, with or without
289 Redistribution and use in source and binary forms, with or without
315 Redistribution and use in source and binary forms, with or without
358 Redistribution and use in source and binary forms, with or without
384 Redistribution and use in source and binary forms, with or without
410 Redistribution, modification, and use in source and binary forms is permitted
412 duplicated in all such forms.
[all …]
DCOPYING.LIBGLOSS26 Redistribution and use in source and binary forms, with or without modification,
54 Redistribution, modification, and use in source and binary forms is permitted
56 duplicated in all such forms.
169 Redistribution and use in source and binary forms, with or without
197 Redistribution and use in source and binary forms, with or without
222 Redistribution and use in source and binary forms, with or without
270 Redistribution and use in source and binary forms, with or without
333 Redistribution and use in source and binary forms, with or without
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/sparc/
Dsave-args.s1 ! Test several forms of save argument
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/
Delf-rel8.s5 # Test various forms of relocation syntax.
Delf-rel8-mips16.s8 # Test various forms of relocation syntax.
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/m68hc11/
D9s12x-exg-sex-tfr.s5 ;; Test all s12x extended forms of exg,tfr,sex where supported
7 ;; presently tmp register and h/l forms not supported in gas
D9s12x-exg-sex-tfr.d3 #name: s12x extended forms of exg,tfr,sex
D9s12x-mov.s5 ;; Test all s12x extended forms of movb, movw
D9s12x-mov.d3 #name: s12x extended forms of movb,movw
/toolchain/binutils/binutils-2.25/gold/
Ddwarf_reader.cc1833 unsigned int *forms = new unsigned int[format_count]; in read_header_tables_v5() local
1839 forms[i] = read_unsigned_LEB_128(lineptr, &len); in read_header_tables_v5()
1856 if (forms[i] == elfcpp::DW_FORM_string) in read_header_tables_v5()
1861 else if (forms[i] == elfcpp::DW_FORM_line_strp) in read_header_tables_v5()
1890 delete[] forms; in read_header_tables_v5()
1897 forms = new unsigned int[format_count]; in read_header_tables_v5()
1903 forms[i] = read_unsigned_LEB_128(lineptr, &len); in read_header_tables_v5()
1922 if (forms[i] == elfcpp::DW_FORM_string) in read_header_tables_v5()
1927 else if (forms[i] == elfcpp::DW_FORM_line_strp) in read_header_tables_v5()
1951 if (forms[i] == elfcpp::DW_FORM_udata) in read_header_tables_v5()
[all …]
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/
Dtcompat2.s1 @ Three-argument forms of Thumb arithmetic instructions.
Dtcompat.s31 @ Two-argument forms of ARM arithmetic instructions.
Dneon-omit.s54 @ Also test three-argument forms without omitted arguments
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/tic54x/
Dlabels.s2 * two forms, $[0-9] and label? are allowed
/toolchain/binutils/binutils-2.25/cpu/
Depiphany.cpu47 ;; 3 bit add/sub immediate forms - useful for relaxing into 11 bit form
55 ;; 8 bit mov immediate forms - useful for relaxing into 16 bit form
1093 ;; Short (16 bit forms) must appear first so that instruction
1094 ;; selection can reject them and match long forms when registers
1463 ;;immediate modes last so reg forms found first.
1615 ;; need 16 bit forms too
2133 ;; Integer arithmetic instructions 3 address forms
2134 ;; both 16 and 32 bit forms
2205 ;; Integer arithmetic immediate forms
2275 ;; Shift instructions 3 address forms
[all …]
Dxstormy16.opc90 /* For the add and subtract instructions, there are two immediate forms,
/toolchain/binutils/binutils-2.25/gas/
DREADME20 into `info' or `dvi' forms.
/toolchain/binutils/binutils-2.25/gas/doc/
Dc-i370.texi82 Many of the usual forms of address constants / address literals
Dc-d10v.texi80 have both short and long forms.
/toolchain/binutils/binutils-2.25/include/opcode/
DChangeLog-9103827 (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not
915 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
916 New operand types l,y,&,fe,fE,fx added to support above forms.
1133 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
1284 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
1530 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
2340 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
2494 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
2944 * i386.h: Fix one-operand forms of in* and out* patterns.
/toolchain/binutils/binutils-2.25/opcodes/
DChangeLog-929712 PC relative offset forms before the 15 bit forms. An assembler command
33 offset forms before the 15 bit forms, to default to the long forms.
298 * d30v-opc.c (SHORT_M2, LONG_M2): Two new forms.
867 (tic80_opcodes): Sort entries so that long immediate forms
868 come after short immediate forms, making it easier for
1261 specifier of the effective-address operand in immediate forms of
1778 All instructions with the same name that have long and short forms
1919 * sparc-opc.c: Add some two operand forms of the wr instruction.
2741 print stylized code forms as defined in App A.4.3 of the
/toolchain/binutils/binutils-2.25/libiberty/
Dlibiberty.texi272 Redistribution and use in source and binary forms, with or without

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