| /toolchain/binutils/binutils-2.25/bfd/ |
| D | cpu-aarch64.c | 69 processors[] = variable
87 for (i = sizeof (processors) / sizeof (processors[0]); i--;) in scan()
89 if (strcasecmp (string, processors[i].name) == 0) in scan()
93 if (i != -1 && info->mach == processors[i].mach) in scan()
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| D | cpu-arm.c | 66 processors[] = variable
109 for (i = sizeof (processors) / sizeof (processors[0]); i--;) in scan()
111 if (strcasecmp (string, processors [i].name) == 0) in scan()
115 if (i != -1 && info->mach == processors [i].mach) in scan()
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| /toolchain/binutils/binutils-2.25/gas/doc/ |
| D | c-v850.texi | 46 such code with code assembled for other processors.
52 such code with code assembled for other processors.
58 such code with code assembled for other processors.
75 such code with code assembled for other processors.
81 such code with code assembled for other processors.
91 such code with code assembled for other processors.
289 such code with code assembled for other processors.
295 such code with code assembled for other processors.
301 such code with code assembled for other processors.
307 such code with code assembled for other processors.
[all …]
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| D | c-ppc.texi | 115 Generate code for processors with AltiVec instructions.
121 Generate code for processors with Vector-Scalar (VSX) instructions.
124 Generate code for processors with Hardware Transactional Memory instructions.
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| D | c-nds32.texi | 17 The NDS32 processors family includes high-performance and low-power 32-bit
18 processors for high-end to low-end. @sc{gnu} @code{@value{AS}} for NDS32
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| D | c-i386.texi | 308 This option is intended as a workaround for processors, that fail on
936 processors and Pentium II processors, AMD's K6 and K6-2 processors,
960 instruction set, available on AMD's Family 15h (Orochi) processors.
993 instruction set, available on AMD's BDVER2 processors (Trinity and
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| D | c-sparc.texi | 190 for their UltraSPARC and Niagara line of processors.
260 processors:
472 processors before the effect of any stores following the
485 processors before loads following the @code{membar} may be performed.
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| D | c-mips.texi | 16 different MIPS processors, and MIPS ISA levels I through V, MIPS32,
94 @samp{-mips1} corresponds to the R2000 and R3000 processors,
96 R4000 processor, and @samp{-mips4} to the R8000 and R10000 processors.
102 Release 3, MIPS64 Release 5, and MIPS64 Release 6 ISA processors,
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| D | c-m68k.texi | 142 are defined as PC-relative. However, on some processors they are limited
148 option has no effect on 68020 and other processors that have long branches.
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| D | fdl.texi | 101 read and edited only by proprietary word processors, @acronym{SGML} or
104 PostScript or @acronym{PDF} produced by some word processors for
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| D | c-xtensa.texi | 270 (Xtensa processors can be configured with either 32-bit or 64-bit
298 instruction. To preserve binary compatibility across processors with
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| D | c-arm.texi | 672 output section. These are not compatible with current ARM processors
767 output section. These are not compatible with current ARM processors
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| /toolchain/binutils/binutils-2.25/include/opcode/ |
| D | v850.h | 54 unsigned int processors; member
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| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/all/ |
| D | itbl | 5 ; The "p<n>" represent processors of a multi-processor system.
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| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/ |
| D | itbl | 5 ; Here, the processors represent mips coprocessors.
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| /toolchain/binutils/binutils-2.25/gas/ |
| D | CONTRIBUTORS | 22 processors, breaking gas up to handle multiple object file format
52 Support for the Zilog Z8k and Hitachi H8/300, H8/500 and SH processors
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| D | configure.ac | 579 # Assign floating point type. Most processors with FP support
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| /toolchain/binutils/binutils-2.25/opcodes/ |
| D | v850-dis.c | 268 && (op->processors & target_processor) in disassemble()
269 && !(op->processors & PROCESSOR_OPTION_ALIAS)) in disassemble()
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| D | ChangeLog-2010 | 334 to processor flags for PENTIUMPRO processors and later.
400 the instructions with specific set of processors.
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| D | ChangeLog-2009 | 1375 instructions from newer processors are listed before older ones.
1376 <"icblce", "sync", "eieio", "tlbld">: Deprecate for processors
1431 instructions from newer processors are listed before older ones.
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| /toolchain/binutils/binutils-2.25/gas/config/ |
| D | tc-v850.c | 51 unsigned int processors; member
978 return ((regs[middle].processors & processor_mask) in reg_name_search()
2349 if ((opcode->processors & processor_mask & PROCESSOR_MASK) == 0 in md_assemble()
2350 || (((opcode->processors & ~PROCESSOR_MASK) != 0) in md_assemble()
2351 && ((opcode->processors & processor_mask & ~PROCESSOR_MASK) == 0))) in md_assemble()
3021 if ((opcode->processors & processor_mask) == 0) in md_assemble()
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| /toolchain/binutils/binutils-2.25/ld/ |
| D | fdl.texi | 101 read and edited only by proprietary word processors, @acronym{SGML} or
104 PostScript or @acronym{PDF} produced by some word processors for
|
| /toolchain/binutils/binutils-2.25/bfd/doc/ |
| D | fdl.texi | 101 read and edited only by proprietary word processors, @acronym{SGML} or
104 PostScript or @acronym{PDF} produced by some word processors for
|
| /toolchain/binutils/binutils-2.25/binutils/doc/ |
| D | fdl.texi | 101 read and edited only by proprietary word processors, @acronym{SGML} or
104 PostScript or @acronym{PDF} produced by some word processors for
|
| /toolchain/binutils/binutils-2.25/gprof/ |
| D | fdl.texi | 101 read and edited only by proprietary word processors, @acronym{SGML} or
104 PostScript or @acronym{PDF} produced by some word processors for
|