1 /*
2  * Copyright (C) 2015 The Android Open Source Project
3  *
4  * Licensed under the Apache License, Version 2.0 (the "License");
5  * you may not use this file except in compliance with the License.
6  * You may obtain a copy of the License at
7  *
8  *      http://www.apache.org/licenses/LICENSE-2.0
9  *
10  * Unless required by applicable law or agreed to in writing, software
11  * distributed under the License is distributed on an "AS IS" BASIS,
12  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13  * See the License for the specific language governing permissions and
14  * limitations under the License.
15  */
16 
17 #ifndef ART_COMPILER_OPTIMIZING_NODES_ARM64_H_
18 #define ART_COMPILER_OPTIMIZING_NODES_ARM64_H_
19 
20 #include "nodes.h"
21 
22 namespace art {
23 
24 class HArm64DataProcWithShifterOp : public HExpression<2> {
25  public:
26   enum OpKind {
27     kLSL,   // Logical shift left.
28     kLSR,   // Logical shift right.
29     kASR,   // Arithmetic shift right.
30     kUXTB,  // Unsigned extend byte.
31     kUXTH,  // Unsigned extend half-word.
32     kUXTW,  // Unsigned extend word.
33     kSXTB,  // Signed extend byte.
34     kSXTH,  // Signed extend half-word.
35     kSXTW,  // Signed extend word.
36 
37     // Aliases.
38     kFirstShiftOp = kLSL,
39     kLastShiftOp = kASR,
40     kFirstExtensionOp = kUXTB,
41     kLastExtensionOp = kSXTW
42   };
43   HArm64DataProcWithShifterOp(HInstruction* instr,
44                               HInstruction* left,
45                               HInstruction* right,
46                               OpKind op,
47                               // The shift argument is unused if the operation
48                               // is an extension.
49                               int shift = 0,
50                               uint32_t dex_pc = kNoDexPc)
51       : HExpression(instr->GetType(), SideEffects::None(), dex_pc),
52         instr_kind_(instr->GetKind()), op_kind_(op), shift_amount_(shift) {
53     DCHECK(!instr->HasSideEffects());
54     SetRawInputAt(0, left);
55     SetRawInputAt(1, right);
56   }
57 
CanBeMoved()58   bool CanBeMoved() const OVERRIDE { return true; }
InstructionDataEquals(HInstruction * other_instr)59   bool InstructionDataEquals(HInstruction* other_instr) const OVERRIDE {
60     HArm64DataProcWithShifterOp* other = other_instr->AsArm64DataProcWithShifterOp();
61     return instr_kind_ == other->instr_kind_ &&
62         op_kind_ == other->op_kind_ &&
63         shift_amount_ == other->shift_amount_;
64   }
65 
IsShiftOp(OpKind op_kind)66   static bool IsShiftOp(OpKind op_kind) {
67     return kFirstShiftOp <= op_kind && op_kind <= kLastShiftOp;
68   }
69 
IsExtensionOp(OpKind op_kind)70   static bool IsExtensionOp(OpKind op_kind) {
71     return kFirstExtensionOp <= op_kind && op_kind <= kLastExtensionOp;
72   }
73 
74   // Find the operation kind and shift amount from a bitfield move instruction.
75   static void GetOpInfoFromInstruction(HInstruction* bitfield_op,
76                                        /*out*/OpKind* op_kind,
77                                        /*out*/int* shift_amount);
78 
GetInstrKind()79   InstructionKind GetInstrKind() const { return instr_kind_; }
GetOpKind()80   OpKind GetOpKind() const { return op_kind_; }
GetShiftAmount()81   int GetShiftAmount() const { return shift_amount_; }
82 
83   DECLARE_INSTRUCTION(Arm64DataProcWithShifterOp);
84 
85  private:
86   InstructionKind instr_kind_;
87   OpKind op_kind_;
88   int shift_amount_;
89 
90   friend std::ostream& operator<<(std::ostream& os, OpKind op);
91 
92   DISALLOW_COPY_AND_ASSIGN(HArm64DataProcWithShifterOp);
93 };
94 
95 std::ostream& operator<<(std::ostream& os, const HArm64DataProcWithShifterOp::OpKind op);
96 
97 // This instruction computes an intermediate address pointing in the 'middle' of an object. The
98 // result pointer cannot be handled by GC, so extra care is taken to make sure that this value is
99 // never used across anything that can trigger GC.
100 class HArm64IntermediateAddress : public HExpression<2> {
101  public:
HArm64IntermediateAddress(HInstruction * base_address,HInstruction * offset,uint32_t dex_pc)102   HArm64IntermediateAddress(HInstruction* base_address, HInstruction* offset, uint32_t dex_pc)
103       : HExpression(Primitive::kPrimNot, SideEffects::DependsOnGC(), dex_pc) {
104     SetRawInputAt(0, base_address);
105     SetRawInputAt(1, offset);
106   }
107 
CanBeMoved()108   bool CanBeMoved() const OVERRIDE { return true; }
InstructionDataEquals(HInstruction * other ATTRIBUTE_UNUSED)109   bool InstructionDataEquals(HInstruction* other ATTRIBUTE_UNUSED) const OVERRIDE { return true; }
IsActualObject()110   bool IsActualObject() const OVERRIDE { return false; }
111 
GetBaseAddress()112   HInstruction* GetBaseAddress() const { return InputAt(0); }
GetOffset()113   HInstruction* GetOffset() const { return InputAt(1); }
114 
115   DECLARE_INSTRUCTION(Arm64IntermediateAddress);
116 
117  private:
118   DISALLOW_COPY_AND_ASSIGN(HArm64IntermediateAddress);
119 };
120 
121 }  // namespace art
122 
123 #endif  // ART_COMPILER_OPTIMIZING_NODES_ARM64_H_
124