1 //===- CodeGenTarget.cpp - CodeGen Target Class Wrapper -------------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This class wraps target description classes used by the various code
11 // generation TableGen backends. This makes it easier to access the data and
12 // provides a single place that needs to check it for validity. All of these
13 // classes abort on error conditions.
14 //
15 //===----------------------------------------------------------------------===//
16
17 #include "CodeGenTarget.h"
18 #include "CodeGenIntrinsics.h"
19 #include "CodeGenSchedule.h"
20 #include "llvm/ADT/STLExtras.h"
21 #include "llvm/ADT/StringExtras.h"
22 #include "llvm/Support/CommandLine.h"
23 #include "llvm/TableGen/Error.h"
24 #include "llvm/TableGen/Record.h"
25 #include <algorithm>
26 using namespace llvm;
27
28 static cl::opt<unsigned>
29 AsmParserNum("asmparsernum", cl::init(0),
30 cl::desc("Make -gen-asm-parser emit assembly parser #N"));
31
32 static cl::opt<unsigned>
33 AsmWriterNum("asmwriternum", cl::init(0),
34 cl::desc("Make -gen-asm-writer emit assembly writer #N"));
35
36 /// getValueType - Return the MVT::SimpleValueType that the specified TableGen
37 /// record corresponds to.
getValueType(Record * Rec)38 MVT::SimpleValueType llvm::getValueType(Record *Rec) {
39 return (MVT::SimpleValueType)Rec->getValueAsInt("Value");
40 }
41
getName(MVT::SimpleValueType T)42 std::string llvm::getName(MVT::SimpleValueType T) {
43 switch (T) {
44 case MVT::Other: return "UNKNOWN";
45 case MVT::iPTR: return "TLI.getPointerTy()";
46 case MVT::iPTRAny: return "TLI.getPointerTy()";
47 default: return getEnumName(T);
48 }
49 }
50
getEnumName(MVT::SimpleValueType T)51 std::string llvm::getEnumName(MVT::SimpleValueType T) {
52 switch (T) {
53 case MVT::Other: return "MVT::Other";
54 case MVT::i1: return "MVT::i1";
55 case MVT::i8: return "MVT::i8";
56 case MVT::i16: return "MVT::i16";
57 case MVT::i32: return "MVT::i32";
58 case MVT::i64: return "MVT::i64";
59 case MVT::i128: return "MVT::i128";
60 case MVT::Any: return "MVT::Any";
61 case MVT::iAny: return "MVT::iAny";
62 case MVT::fAny: return "MVT::fAny";
63 case MVT::vAny: return "MVT::vAny";
64 case MVT::f16: return "MVT::f16";
65 case MVT::f32: return "MVT::f32";
66 case MVT::f64: return "MVT::f64";
67 case MVT::f80: return "MVT::f80";
68 case MVT::f128: return "MVT::f128";
69 case MVT::ppcf128: return "MVT::ppcf128";
70 case MVT::x86mmx: return "MVT::x86mmx";
71 case MVT::Glue: return "MVT::Glue";
72 case MVT::isVoid: return "MVT::isVoid";
73 case MVT::v2i1: return "MVT::v2i1";
74 case MVT::v4i1: return "MVT::v4i1";
75 case MVT::v8i1: return "MVT::v8i1";
76 case MVT::v16i1: return "MVT::v16i1";
77 case MVT::v32i1: return "MVT::v32i1";
78 case MVT::v64i1: return "MVT::v64i1";
79 case MVT::v512i1: return "MVT::v512i1";
80 case MVT::v1024i1: return "MVT::v1024i1";
81 case MVT::v1i8: return "MVT::v1i8";
82 case MVT::v2i8: return "MVT::v2i8";
83 case MVT::v4i8: return "MVT::v4i8";
84 case MVT::v8i8: return "MVT::v8i8";
85 case MVT::v16i8: return "MVT::v16i8";
86 case MVT::v32i8: return "MVT::v32i8";
87 case MVT::v64i8: return "MVT::v64i8";
88 case MVT::v128i8: return "MVT::v128i8";
89 case MVT::v256i8: return "MVT::v256i8";
90 case MVT::v1i16: return "MVT::v1i16";
91 case MVT::v2i16: return "MVT::v2i16";
92 case MVT::v4i16: return "MVT::v4i16";
93 case MVT::v8i16: return "MVT::v8i16";
94 case MVT::v16i16: return "MVT::v16i16";
95 case MVT::v32i16: return "MVT::v32i16";
96 case MVT::v64i16: return "MVT::v64i16";
97 case MVT::v128i16: return "MVT::v128i16";
98 case MVT::v1i32: return "MVT::v1i32";
99 case MVT::v2i32: return "MVT::v2i32";
100 case MVT::v4i32: return "MVT::v4i32";
101 case MVT::v8i32: return "MVT::v8i32";
102 case MVT::v16i32: return "MVT::v16i32";
103 case MVT::v32i32: return "MVT::v32i32";
104 case MVT::v64i32: return "MVT::v64i32";
105 case MVT::v1i64: return "MVT::v1i64";
106 case MVT::v2i64: return "MVT::v2i64";
107 case MVT::v4i64: return "MVT::v4i64";
108 case MVT::v8i64: return "MVT::v8i64";
109 case MVT::v16i64: return "MVT::v16i64";
110 case MVT::v32i64: return "MVT::v32i64";
111 case MVT::v1i128: return "MVT::v1i128";
112 case MVT::v2f16: return "MVT::v2f16";
113 case MVT::v4f16: return "MVT::v4f16";
114 case MVT::v8f16: return "MVT::v8f16";
115 case MVT::v1f32: return "MVT::v1f32";
116 case MVT::v2f32: return "MVT::v2f32";
117 case MVT::v4f32: return "MVT::v4f32";
118 case MVT::v8f32: return "MVT::v8f32";
119 case MVT::v16f32: return "MVT::v16f32";
120 case MVT::v1f64: return "MVT::v1f64";
121 case MVT::v2f64: return "MVT::v2f64";
122 case MVT::v4f64: return "MVT::v4f64";
123 case MVT::v8f64: return "MVT::v8f64";
124 case MVT::token: return "MVT::token";
125 case MVT::Metadata: return "MVT::Metadata";
126 case MVT::iPTR: return "MVT::iPTR";
127 case MVT::iPTRAny: return "MVT::iPTRAny";
128 case MVT::Untyped: return "MVT::Untyped";
129 default: llvm_unreachable("ILLEGAL VALUE TYPE!");
130 }
131 }
132
133 /// getQualifiedName - Return the name of the specified record, with a
134 /// namespace qualifier if the record contains one.
135 ///
getQualifiedName(const Record * R)136 std::string llvm::getQualifiedName(const Record *R) {
137 std::string Namespace;
138 if (R->getValue("Namespace"))
139 Namespace = R->getValueAsString("Namespace");
140 if (Namespace.empty()) return R->getName();
141 return Namespace + "::" + R->getName();
142 }
143
144
145 /// getTarget - Return the current instance of the Target class.
146 ///
CodeGenTarget(RecordKeeper & records)147 CodeGenTarget::CodeGenTarget(RecordKeeper &records)
148 : Records(records) {
149 std::vector<Record*> Targets = Records.getAllDerivedDefinitions("Target");
150 if (Targets.size() == 0)
151 PrintFatalError("ERROR: No 'Target' subclasses defined!");
152 if (Targets.size() != 1)
153 PrintFatalError("ERROR: Multiple subclasses of Target defined!");
154 TargetRec = Targets[0];
155 }
156
~CodeGenTarget()157 CodeGenTarget::~CodeGenTarget() {
158 }
159
getName() const160 const std::string &CodeGenTarget::getName() const {
161 return TargetRec->getName();
162 }
163
getInstNamespace() const164 std::string CodeGenTarget::getInstNamespace() const {
165 for (const CodeGenInstruction *Inst : instructions()) {
166 // Make sure not to pick up "TargetOpcode" by accidentally getting
167 // the namespace off the PHI instruction or something.
168 if (Inst->Namespace != "TargetOpcode")
169 return Inst->Namespace;
170 }
171
172 return "";
173 }
174
getInstructionSet() const175 Record *CodeGenTarget::getInstructionSet() const {
176 return TargetRec->getValueAsDef("InstructionSet");
177 }
178
179
180 /// getAsmParser - Return the AssemblyParser definition for this target.
181 ///
getAsmParser() const182 Record *CodeGenTarget::getAsmParser() const {
183 std::vector<Record*> LI = TargetRec->getValueAsListOfDefs("AssemblyParsers");
184 if (AsmParserNum >= LI.size())
185 PrintFatalError("Target does not have an AsmParser #" +
186 Twine(AsmParserNum) + "!");
187 return LI[AsmParserNum];
188 }
189
190 /// getAsmParserVariant - Return the AssmblyParserVariant definition for
191 /// this target.
192 ///
getAsmParserVariant(unsigned i) const193 Record *CodeGenTarget::getAsmParserVariant(unsigned i) const {
194 std::vector<Record*> LI =
195 TargetRec->getValueAsListOfDefs("AssemblyParserVariants");
196 if (i >= LI.size())
197 PrintFatalError("Target does not have an AsmParserVariant #" + Twine(i) +
198 "!");
199 return LI[i];
200 }
201
202 /// getAsmParserVariantCount - Return the AssmblyParserVariant definition
203 /// available for this target.
204 ///
getAsmParserVariantCount() const205 unsigned CodeGenTarget::getAsmParserVariantCount() const {
206 std::vector<Record*> LI =
207 TargetRec->getValueAsListOfDefs("AssemblyParserVariants");
208 return LI.size();
209 }
210
211 /// getAsmWriter - Return the AssemblyWriter definition for this target.
212 ///
getAsmWriter() const213 Record *CodeGenTarget::getAsmWriter() const {
214 std::vector<Record*> LI = TargetRec->getValueAsListOfDefs("AssemblyWriters");
215 if (AsmWriterNum >= LI.size())
216 PrintFatalError("Target does not have an AsmWriter #" +
217 Twine(AsmWriterNum) + "!");
218 return LI[AsmWriterNum];
219 }
220
getRegBank() const221 CodeGenRegBank &CodeGenTarget::getRegBank() const {
222 if (!RegBank)
223 RegBank = llvm::make_unique<CodeGenRegBank>(Records);
224 return *RegBank;
225 }
226
ReadRegAltNameIndices() const227 void CodeGenTarget::ReadRegAltNameIndices() const {
228 RegAltNameIndices = Records.getAllDerivedDefinitions("RegAltNameIndex");
229 std::sort(RegAltNameIndices.begin(), RegAltNameIndices.end(), LessRecord());
230 }
231
232 /// getRegisterByName - If there is a register with the specific AsmName,
233 /// return it.
getRegisterByName(StringRef Name) const234 const CodeGenRegister *CodeGenTarget::getRegisterByName(StringRef Name) const {
235 const StringMap<CodeGenRegister*> &Regs = getRegBank().getRegistersByName();
236 StringMap<CodeGenRegister*>::const_iterator I = Regs.find(Name);
237 if (I == Regs.end())
238 return nullptr;
239 return I->second;
240 }
241
242 std::vector<MVT::SimpleValueType> CodeGenTarget::
getRegisterVTs(Record * R) const243 getRegisterVTs(Record *R) const {
244 const CodeGenRegister *Reg = getRegBank().getReg(R);
245 std::vector<MVT::SimpleValueType> Result;
246 for (const auto &RC : getRegBank().getRegClasses()) {
247 if (RC.contains(Reg)) {
248 ArrayRef<MVT::SimpleValueType> InVTs = RC.getValueTypes();
249 Result.insert(Result.end(), InVTs.begin(), InVTs.end());
250 }
251 }
252
253 // Remove duplicates.
254 array_pod_sort(Result.begin(), Result.end());
255 Result.erase(std::unique(Result.begin(), Result.end()), Result.end());
256 return Result;
257 }
258
259
ReadLegalValueTypes() const260 void CodeGenTarget::ReadLegalValueTypes() const {
261 for (const auto &RC : getRegBank().getRegClasses())
262 LegalValueTypes.insert(LegalValueTypes.end(), RC.VTs.begin(), RC.VTs.end());
263
264 // Remove duplicates.
265 array_pod_sort(LegalValueTypes.begin(), LegalValueTypes.end());
266 LegalValueTypes.erase(std::unique(LegalValueTypes.begin(),
267 LegalValueTypes.end()),
268 LegalValueTypes.end());
269 }
270
getSchedModels() const271 CodeGenSchedModels &CodeGenTarget::getSchedModels() const {
272 if (!SchedModels)
273 SchedModels = llvm::make_unique<CodeGenSchedModels>(Records, *this);
274 return *SchedModels;
275 }
276
ReadInstructions() const277 void CodeGenTarget::ReadInstructions() const {
278 std::vector<Record*> Insts = Records.getAllDerivedDefinitions("Instruction");
279 if (Insts.size() <= 2)
280 PrintFatalError("No 'Instruction' subclasses defined!");
281
282 // Parse the instructions defined in the .td file.
283 for (unsigned i = 0, e = Insts.size(); i != e; ++i)
284 Instructions[Insts[i]] = llvm::make_unique<CodeGenInstruction>(Insts[i]);
285 }
286
287 static const CodeGenInstruction *
GetInstByName(const char * Name,const DenseMap<const Record *,std::unique_ptr<CodeGenInstruction>> & Insts,RecordKeeper & Records)288 GetInstByName(const char *Name,
289 const DenseMap<const Record*,
290 std::unique_ptr<CodeGenInstruction>> &Insts,
291 RecordKeeper &Records) {
292 const Record *Rec = Records.getDef(Name);
293
294 const auto I = Insts.find(Rec);
295 if (!Rec || I == Insts.end())
296 PrintFatalError(Twine("Could not find '") + Name + "' instruction!");
297 return I->second.get();
298 }
299
300 /// \brief Return all of the instructions defined by the target, ordered by
301 /// their enum value.
ComputeInstrsByEnum() const302 void CodeGenTarget::ComputeInstrsByEnum() const {
303 // The ordering here must match the ordering in TargetOpcodes.h.
304 static const char *const FixedInstrs[] = {
305 "PHI", "INLINEASM", "CFI_INSTRUCTION", "EH_LABEL",
306 "GC_LABEL", "KILL", "EXTRACT_SUBREG", "INSERT_SUBREG",
307 "IMPLICIT_DEF", "SUBREG_TO_REG", "COPY_TO_REGCLASS", "DBG_VALUE",
308 "REG_SEQUENCE", "COPY", "BUNDLE", "LIFETIME_START",
309 "LIFETIME_END", "STACKMAP", "PATCHPOINT", "LOAD_STACK_GUARD",
310 "STATEPOINT", "LOCAL_ESCAPE", "FAULTING_LOAD_OP",
311 nullptr};
312 const auto &Insts = getInstructions();
313 for (const char *const *p = FixedInstrs; *p; ++p) {
314 const CodeGenInstruction *Instr = GetInstByName(*p, Insts, Records);
315 assert(Instr && "Missing target independent instruction");
316 assert(Instr->Namespace == "TargetOpcode" && "Bad namespace");
317 InstrsByEnum.push_back(Instr);
318 }
319 unsigned EndOfPredefines = InstrsByEnum.size();
320
321 for (const auto &I : Insts) {
322 const CodeGenInstruction *CGI = I.second.get();
323 if (CGI->Namespace != "TargetOpcode")
324 InstrsByEnum.push_back(CGI);
325 }
326
327 assert(InstrsByEnum.size() == Insts.size() && "Missing predefined instr");
328
329 // All of the instructions are now in random order based on the map iteration.
330 // Sort them by name.
331 std::sort(InstrsByEnum.begin() + EndOfPredefines, InstrsByEnum.end(),
332 [](const CodeGenInstruction *Rec1, const CodeGenInstruction *Rec2) {
333 return Rec1->TheDef->getName() < Rec2->TheDef->getName();
334 });
335 }
336
337
338 /// isLittleEndianEncoding - Return whether this target encodes its instruction
339 /// in little-endian format, i.e. bits laid out in the order [0..n]
340 ///
isLittleEndianEncoding() const341 bool CodeGenTarget::isLittleEndianEncoding() const {
342 return getInstructionSet()->getValueAsBit("isLittleEndianEncoding");
343 }
344
345 /// reverseBitsForLittleEndianEncoding - For little-endian instruction bit
346 /// encodings, reverse the bit order of all instructions.
reverseBitsForLittleEndianEncoding()347 void CodeGenTarget::reverseBitsForLittleEndianEncoding() {
348 if (!isLittleEndianEncoding())
349 return;
350
351 std::vector<Record*> Insts = Records.getAllDerivedDefinitions("Instruction");
352 for (Record *R : Insts) {
353 if (R->getValueAsString("Namespace") == "TargetOpcode" ||
354 R->getValueAsBit("isPseudo"))
355 continue;
356
357 BitsInit *BI = R->getValueAsBitsInit("Inst");
358
359 unsigned numBits = BI->getNumBits();
360
361 SmallVector<Init *, 16> NewBits(numBits);
362
363 for (unsigned bit = 0, end = numBits / 2; bit != end; ++bit) {
364 unsigned bitSwapIdx = numBits - bit - 1;
365 Init *OrigBit = BI->getBit(bit);
366 Init *BitSwap = BI->getBit(bitSwapIdx);
367 NewBits[bit] = BitSwap;
368 NewBits[bitSwapIdx] = OrigBit;
369 }
370 if (numBits % 2) {
371 unsigned middle = (numBits + 1) / 2;
372 NewBits[middle] = BI->getBit(middle);
373 }
374
375 BitsInit *NewBI = BitsInit::get(NewBits);
376
377 // Update the bits in reversed order so that emitInstrOpBits will get the
378 // correct endianness.
379 R->getValue("Inst")->setValue(NewBI);
380 }
381 }
382
383 /// guessInstructionProperties - Return true if it's OK to guess instruction
384 /// properties instead of raising an error.
385 ///
386 /// This is configurable as a temporary migration aid. It will eventually be
387 /// permanently false.
guessInstructionProperties() const388 bool CodeGenTarget::guessInstructionProperties() const {
389 return getInstructionSet()->getValueAsBit("guessInstructionProperties");
390 }
391
392 //===----------------------------------------------------------------------===//
393 // ComplexPattern implementation
394 //
ComplexPattern(Record * R)395 ComplexPattern::ComplexPattern(Record *R) {
396 Ty = ::getValueType(R->getValueAsDef("Ty"));
397 NumOperands = R->getValueAsInt("NumOperands");
398 SelectFunc = R->getValueAsString("SelectFunc");
399 RootNodes = R->getValueAsListOfDefs("RootNodes");
400
401 // Parse the properties.
402 Properties = 0;
403 std::vector<Record*> PropList = R->getValueAsListOfDefs("Properties");
404 for (unsigned i = 0, e = PropList.size(); i != e; ++i)
405 if (PropList[i]->getName() == "SDNPHasChain") {
406 Properties |= 1 << SDNPHasChain;
407 } else if (PropList[i]->getName() == "SDNPOptInGlue") {
408 Properties |= 1 << SDNPOptInGlue;
409 } else if (PropList[i]->getName() == "SDNPMayStore") {
410 Properties |= 1 << SDNPMayStore;
411 } else if (PropList[i]->getName() == "SDNPMayLoad") {
412 Properties |= 1 << SDNPMayLoad;
413 } else if (PropList[i]->getName() == "SDNPSideEffect") {
414 Properties |= 1 << SDNPSideEffect;
415 } else if (PropList[i]->getName() == "SDNPMemOperand") {
416 Properties |= 1 << SDNPMemOperand;
417 } else if (PropList[i]->getName() == "SDNPVariadic") {
418 Properties |= 1 << SDNPVariadic;
419 } else if (PropList[i]->getName() == "SDNPWantRoot") {
420 Properties |= 1 << SDNPWantRoot;
421 } else if (PropList[i]->getName() == "SDNPWantParent") {
422 Properties |= 1 << SDNPWantParent;
423 } else {
424 PrintFatalError("Unsupported SD Node property '" +
425 PropList[i]->getName() + "' on ComplexPattern '" +
426 R->getName() + "'!");
427 }
428 }
429
430 //===----------------------------------------------------------------------===//
431 // CodeGenIntrinsic Implementation
432 //===----------------------------------------------------------------------===//
433
LoadIntrinsics(const RecordKeeper & RC,bool TargetOnly)434 std::vector<CodeGenIntrinsic> llvm::LoadIntrinsics(const RecordKeeper &RC,
435 bool TargetOnly) {
436 std::vector<Record*> I = RC.getAllDerivedDefinitions("Intrinsic");
437
438 std::vector<CodeGenIntrinsic> Result;
439
440 for (unsigned i = 0, e = I.size(); i != e; ++i) {
441 bool isTarget = I[i]->getValueAsBit("isTarget");
442 if (isTarget == TargetOnly)
443 Result.push_back(CodeGenIntrinsic(I[i]));
444 }
445 return Result;
446 }
447
CodeGenIntrinsic(Record * R)448 CodeGenIntrinsic::CodeGenIntrinsic(Record *R) {
449 TheDef = R;
450 std::string DefName = R->getName();
451 ModRef = ReadWriteMem;
452 isOverloaded = false;
453 isCommutative = false;
454 canThrow = false;
455 isNoReturn = false;
456 isNoDuplicate = false;
457 isConvergent = false;
458
459 if (DefName.size() <= 4 ||
460 std::string(DefName.begin(), DefName.begin() + 4) != "int_")
461 PrintFatalError("Intrinsic '" + DefName + "' does not start with 'int_'!");
462
463 EnumName = std::string(DefName.begin()+4, DefName.end());
464
465 if (R->getValue("GCCBuiltinName")) // Ignore a missing GCCBuiltinName field.
466 GCCBuiltinName = R->getValueAsString("GCCBuiltinName");
467 if (R->getValue("MSBuiltinName")) // Ignore a missing MSBuiltinName field.
468 MSBuiltinName = R->getValueAsString("MSBuiltinName");
469
470 TargetPrefix = R->getValueAsString("TargetPrefix");
471 Name = R->getValueAsString("LLVMName");
472
473 if (Name == "") {
474 // If an explicit name isn't specified, derive one from the DefName.
475 Name = "llvm.";
476
477 for (unsigned i = 0, e = EnumName.size(); i != e; ++i)
478 Name += (EnumName[i] == '_') ? '.' : EnumName[i];
479 } else {
480 // Verify it starts with "llvm.".
481 if (Name.size() <= 5 ||
482 std::string(Name.begin(), Name.begin() + 5) != "llvm.")
483 PrintFatalError("Intrinsic '" + DefName + "'s name does not start with 'llvm.'!");
484 }
485
486 // If TargetPrefix is specified, make sure that Name starts with
487 // "llvm.<targetprefix>.".
488 if (!TargetPrefix.empty()) {
489 if (Name.size() < 6+TargetPrefix.size() ||
490 std::string(Name.begin() + 5, Name.begin() + 6 + TargetPrefix.size())
491 != (TargetPrefix + "."))
492 PrintFatalError("Intrinsic '" + DefName + "' does not start with 'llvm." +
493 TargetPrefix + ".'!");
494 }
495
496 // Parse the list of return types.
497 std::vector<MVT::SimpleValueType> OverloadedVTs;
498 ListInit *TypeList = R->getValueAsListInit("RetTypes");
499 for (unsigned i = 0, e = TypeList->size(); i != e; ++i) {
500 Record *TyEl = TypeList->getElementAsRecord(i);
501 assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!");
502 MVT::SimpleValueType VT;
503 if (TyEl->isSubClassOf("LLVMMatchType")) {
504 unsigned MatchTy = TyEl->getValueAsInt("Number");
505 assert(MatchTy < OverloadedVTs.size() &&
506 "Invalid matching number!");
507 VT = OverloadedVTs[MatchTy];
508 // It only makes sense to use the extended and truncated vector element
509 // variants with iAny types; otherwise, if the intrinsic is not
510 // overloaded, all the types can be specified directly.
511 assert(((!TyEl->isSubClassOf("LLVMExtendedType") &&
512 !TyEl->isSubClassOf("LLVMTruncatedType")) ||
513 VT == MVT::iAny || VT == MVT::vAny) &&
514 "Expected iAny or vAny type");
515 } else {
516 VT = getValueType(TyEl->getValueAsDef("VT"));
517 }
518 if (MVT(VT).isOverloaded()) {
519 OverloadedVTs.push_back(VT);
520 isOverloaded = true;
521 }
522
523 // Reject invalid types.
524 if (VT == MVT::isVoid)
525 PrintFatalError("Intrinsic '" + DefName + " has void in result type list!");
526
527 IS.RetVTs.push_back(VT);
528 IS.RetTypeDefs.push_back(TyEl);
529 }
530
531 // Parse the list of parameter types.
532 TypeList = R->getValueAsListInit("ParamTypes");
533 for (unsigned i = 0, e = TypeList->size(); i != e; ++i) {
534 Record *TyEl = TypeList->getElementAsRecord(i);
535 assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!");
536 MVT::SimpleValueType VT;
537 if (TyEl->isSubClassOf("LLVMMatchType")) {
538 unsigned MatchTy = TyEl->getValueAsInt("Number");
539 assert(MatchTy < OverloadedVTs.size() &&
540 "Invalid matching number!");
541 VT = OverloadedVTs[MatchTy];
542 // It only makes sense to use the extended and truncated vector element
543 // variants with iAny types; otherwise, if the intrinsic is not
544 // overloaded, all the types can be specified directly.
545 assert(((!TyEl->isSubClassOf("LLVMExtendedType") &&
546 !TyEl->isSubClassOf("LLVMTruncatedType") &&
547 !TyEl->isSubClassOf("LLVMVectorSameWidth") &&
548 !TyEl->isSubClassOf("LLVMPointerToElt")) ||
549 VT == MVT::iAny || VT == MVT::vAny) &&
550 "Expected iAny or vAny type");
551 } else
552 VT = getValueType(TyEl->getValueAsDef("VT"));
553
554 if (MVT(VT).isOverloaded()) {
555 OverloadedVTs.push_back(VT);
556 isOverloaded = true;
557 }
558
559 // Reject invalid types.
560 if (VT == MVT::isVoid && i != e-1 /*void at end means varargs*/)
561 PrintFatalError("Intrinsic '" + DefName + " has void in result type list!");
562
563 IS.ParamVTs.push_back(VT);
564 IS.ParamTypeDefs.push_back(TyEl);
565 }
566
567 // Parse the intrinsic properties.
568 ListInit *PropList = R->getValueAsListInit("Properties");
569 for (unsigned i = 0, e = PropList->size(); i != e; ++i) {
570 Record *Property = PropList->getElementAsRecord(i);
571 assert(Property->isSubClassOf("IntrinsicProperty") &&
572 "Expected a property!");
573
574 if (Property->getName() == "IntrNoMem")
575 ModRef = NoMem;
576 else if (Property->getName() == "IntrReadArgMem")
577 ModRef = ReadArgMem;
578 else if (Property->getName() == "IntrReadMem")
579 ModRef = ReadMem;
580 else if (Property->getName() == "IntrReadWriteArgMem")
581 ModRef = ReadWriteArgMem;
582 else if (Property->getName() == "Commutative")
583 isCommutative = true;
584 else if (Property->getName() == "Throws")
585 canThrow = true;
586 else if (Property->getName() == "IntrNoDuplicate")
587 isNoDuplicate = true;
588 else if (Property->getName() == "IntrConvergent")
589 isConvergent = true;
590 else if (Property->getName() == "IntrNoReturn")
591 isNoReturn = true;
592 else if (Property->isSubClassOf("NoCapture")) {
593 unsigned ArgNo = Property->getValueAsInt("ArgNo");
594 ArgumentAttributes.push_back(std::make_pair(ArgNo, NoCapture));
595 } else if (Property->isSubClassOf("ReadOnly")) {
596 unsigned ArgNo = Property->getValueAsInt("ArgNo");
597 ArgumentAttributes.push_back(std::make_pair(ArgNo, ReadOnly));
598 } else if (Property->isSubClassOf("ReadNone")) {
599 unsigned ArgNo = Property->getValueAsInt("ArgNo");
600 ArgumentAttributes.push_back(std::make_pair(ArgNo, ReadNone));
601 } else
602 llvm_unreachable("Unknown property!");
603 }
604
605 // Sort the argument attributes for later benefit.
606 std::sort(ArgumentAttributes.begin(), ArgumentAttributes.end());
607 }
608