Lines Matching refs:T9
524 DCHECK_EQ(entrypoint_.AsRegister<GpuRegister>(), T9); in EmitNativeCode()
1625 blocked_core_registers_[T9] = true; in SetupBlockedRegisters()
1684 __ LoadFromOffset(kLoadDoubleword, T9, TR, entry_point_offset); in GenerateInvokeRuntime()
1685 __ Jalr(T9); in GenerateInvokeRuntime()
4301 Location temp = Location::RegisterLocation(T9); in GenerateGcRootFieldLoad()
4828 __ LoadFromOffset(kLoadDoubleword, T9, temp, entry_point.Int32Value()); in VisitInvokeInterface()
4830 __ Jalr(T9); in VisitInvokeInterface()
5011 T9, in GenerateStaticOrDirectCall()
5016 __ Jalr(T9); in GenerateStaticOrDirectCall()
5068 __ LoadFromOffset(kLoadDoubleword, T9, temp, entry_point.Int32Value()); in GenerateVirtualCall()
5070 __ Jalr(T9); in GenerateVirtualCall()
5480 __ LoadFromOffset(kLoadDoubleword, T9, temp, code_offset.Int32Value()); in VisitNewInstance()
5481 __ Jalr(T9); in VisitNewInstance()