Lines Matching refs:src
141 void X86_64Assembler::movq(CpuRegister dst, CpuRegister src) { in movq() argument
144 EmitRex64(src, dst); in movq()
146 EmitRegisterOperand(src.LowBits(), dst.LowBits()); in movq()
150 void X86_64Assembler::movl(CpuRegister dst, CpuRegister src) { in movl() argument
152 EmitOptionalRex32(dst, src); in movl()
154 EmitRegisterOperand(dst.LowBits(), src.LowBits()); in movl()
158 void X86_64Assembler::movq(CpuRegister dst, const Address& src) { in movq() argument
160 EmitRex64(dst, src); in movq()
162 EmitOperand(dst.LowBits(), src); in movq()
166 void X86_64Assembler::movl(CpuRegister dst, const Address& src) { in movl() argument
168 EmitOptionalRex32(dst, src); in movl()
170 EmitOperand(dst.LowBits(), src); in movl()
174 void X86_64Assembler::movq(const Address& dst, CpuRegister src) { in movq() argument
176 EmitRex64(src, dst); in movq()
178 EmitOperand(src.LowBits(), dst); in movq()
182 void X86_64Assembler::movl(const Address& dst, CpuRegister src) { in movl() argument
184 EmitOptionalRex32(src, dst); in movl()
186 EmitOperand(src.LowBits(), dst); in movl()
197 void X86_64Assembler::movntl(const Address& dst, CpuRegister src) { in movntl() argument
199 EmitOptionalRex32(src, dst); in movntl()
202 EmitOperand(src.LowBits(), dst); in movntl()
205 void X86_64Assembler::movntq(const Address& dst, CpuRegister src) { in movntq() argument
207 EmitRex64(src, dst); in movntq()
210 EmitOperand(src.LowBits(), dst); in movntq()
213 void X86_64Assembler::cmov(Condition c, CpuRegister dst, CpuRegister src) { in cmov() argument
214 cmov(c, dst, src, true); in cmov()
217 void X86_64Assembler::cmov(Condition c, CpuRegister dst, CpuRegister src, bool is64bit) { in cmov() argument
219 EmitOptionalRex(false, is64bit, dst.NeedsRex(), false, src.NeedsRex()); in cmov()
222 EmitRegisterOperand(dst.LowBits(), src.LowBits()); in cmov()
226 void X86_64Assembler::cmov(Condition c, CpuRegister dst, const Address& src, bool is64bit) { in cmov() argument
229 EmitRex64(dst, src); in cmov()
231 EmitOptionalRex32(dst, src); in cmov()
235 EmitOperand(dst.LowBits(), src); in cmov()
239 void X86_64Assembler::movzxb(CpuRegister dst, CpuRegister src) { in movzxb() argument
241 EmitOptionalByteRegNormalizingRex32(dst, src); in movzxb()
244 EmitRegisterOperand(dst.LowBits(), src.LowBits()); in movzxb()
248 void X86_64Assembler::movzxb(CpuRegister dst, const Address& src) { in movzxb() argument
252 EmitOptionalRex32(dst, src); in movzxb()
255 EmitOperand(dst.LowBits(), src); in movzxb()
259 void X86_64Assembler::movsxb(CpuRegister dst, CpuRegister src) { in movsxb() argument
261 EmitOptionalByteRegNormalizingRex32(dst, src); in movsxb()
264 EmitRegisterOperand(dst.LowBits(), src.LowBits()); in movsxb()
268 void X86_64Assembler::movsxb(CpuRegister dst, const Address& src) { in movsxb() argument
272 EmitOptionalRex32(dst, src); in movsxb()
275 EmitOperand(dst.LowBits(), src); in movsxb()
284 void X86_64Assembler::movb(const Address& dst, CpuRegister src) { in movb() argument
286 EmitOptionalByteRegNormalizingRex32(src, dst); in movb()
288 EmitOperand(src.LowBits(), dst); in movb()
302 void X86_64Assembler::movzxw(CpuRegister dst, CpuRegister src) { in movzxw() argument
304 EmitOptionalRex32(dst, src); in movzxw()
307 EmitRegisterOperand(dst.LowBits(), src.LowBits()); in movzxw()
311 void X86_64Assembler::movzxw(CpuRegister dst, const Address& src) { in movzxw() argument
313 EmitOptionalRex32(dst, src); in movzxw()
316 EmitOperand(dst.LowBits(), src); in movzxw()
320 void X86_64Assembler::movsxw(CpuRegister dst, CpuRegister src) { in movsxw() argument
322 EmitOptionalRex32(dst, src); in movsxw()
325 EmitRegisterOperand(dst.LowBits(), src.LowBits()); in movsxw()
329 void X86_64Assembler::movsxw(CpuRegister dst, const Address& src) { in movsxw() argument
331 EmitOptionalRex32(dst, src); in movsxw()
334 EmitOperand(dst.LowBits(), src); in movsxw()
343 void X86_64Assembler::movw(const Address& dst, CpuRegister src) { in movw() argument
346 EmitOptionalRex32(src, dst); in movw()
348 EmitOperand(src.LowBits(), dst); in movw()
364 void X86_64Assembler::leaq(CpuRegister dst, const Address& src) { in leaq() argument
366 EmitRex64(dst, src); in leaq()
368 EmitOperand(dst.LowBits(), src); in leaq()
372 void X86_64Assembler::leal(CpuRegister dst, const Address& src) { in leal() argument
374 EmitOptionalRex32(dst, src); in leal()
376 EmitOperand(dst.LowBits(), src); in leal()
380 void X86_64Assembler::movaps(XmmRegister dst, XmmRegister src) { in movaps() argument
382 EmitOptionalRex32(dst, src); in movaps()
385 EmitXmmRegisterOperand(dst.LowBits(), src); in movaps()
389 void X86_64Assembler::movaps(XmmRegister dst, const Address& src) { in movaps() argument
391 EmitOptionalRex32(dst, src); in movaps()
394 EmitOperand(dst.LowBits(), src); in movaps()
398 void X86_64Assembler::movups(XmmRegister dst, const Address& src) { in movups() argument
400 EmitOptionalRex32(dst, src); in movups()
403 EmitOperand(dst.LowBits(), src); in movups()
407 void X86_64Assembler::movaps(const Address& dst, XmmRegister src) { in movaps() argument
409 EmitOptionalRex32(src, dst); in movaps()
412 EmitOperand(src.LowBits(), dst); in movaps()
416 void X86_64Assembler::movups(const Address& dst, XmmRegister src) { in movups() argument
418 EmitOptionalRex32(src, dst); in movups()
421 EmitOperand(src.LowBits(), dst); in movups()
425 void X86_64Assembler::movss(XmmRegister dst, const Address& src) { in movss() argument
428 EmitOptionalRex32(dst, src); in movss()
431 EmitOperand(dst.LowBits(), src); in movss()
435 void X86_64Assembler::movss(const Address& dst, XmmRegister src) { in movss() argument
438 EmitOptionalRex32(src, dst); in movss()
441 EmitOperand(src.LowBits(), dst); in movss()
445 void X86_64Assembler::movss(XmmRegister dst, XmmRegister src) { in movss() argument
448 EmitOptionalRex32(src, dst); // Movss is MR encoding instead of the usual RM. in movss()
451 EmitXmmRegisterOperand(src.LowBits(), dst); in movss()
455 void X86_64Assembler::movsxd(CpuRegister dst, CpuRegister src) { in movsxd() argument
457 EmitRex64(dst, src); in movsxd()
459 EmitRegisterOperand(dst.LowBits(), src.LowBits()); in movsxd()
463 void X86_64Assembler::movsxd(CpuRegister dst, const Address& src) { in movsxd() argument
465 EmitRex64(dst, src); in movsxd()
467 EmitOperand(dst.LowBits(), src); in movsxd()
471 void X86_64Assembler::movd(XmmRegister dst, CpuRegister src) { in movd() argument
472 movd(dst, src, true); in movd()
475 void X86_64Assembler::movd(CpuRegister dst, XmmRegister src) { in movd() argument
476 movd(dst, src, true); in movd()
479 void X86_64Assembler::movd(XmmRegister dst, CpuRegister src, bool is64bit) { in movd() argument
482 EmitOptionalRex(false, is64bit, dst.NeedsRex(), false, src.NeedsRex()); in movd()
485 EmitOperand(dst.LowBits(), Operand(src)); in movd()
488 void X86_64Assembler::movd(CpuRegister dst, XmmRegister src, bool is64bit) { in movd() argument
491 EmitOptionalRex(false, is64bit, src.NeedsRex(), false, dst.NeedsRex()); in movd()
494 EmitOperand(src.LowBits(), Operand(dst)); in movd()
498 void X86_64Assembler::addss(XmmRegister dst, XmmRegister src) { in addss() argument
501 EmitOptionalRex32(dst, src); in addss()
504 EmitXmmRegisterOperand(dst.LowBits(), src); in addss()
508 void X86_64Assembler::addss(XmmRegister dst, const Address& src) { in addss() argument
511 EmitOptionalRex32(dst, src); in addss()
514 EmitOperand(dst.LowBits(), src); in addss()
518 void X86_64Assembler::subss(XmmRegister dst, XmmRegister src) { in subss() argument
521 EmitOptionalRex32(dst, src); in subss()
524 EmitXmmRegisterOperand(dst.LowBits(), src); in subss()
528 void X86_64Assembler::subss(XmmRegister dst, const Address& src) { in subss() argument
531 EmitOptionalRex32(dst, src); in subss()
534 EmitOperand(dst.LowBits(), src); in subss()
538 void X86_64Assembler::mulss(XmmRegister dst, XmmRegister src) { in mulss() argument
541 EmitOptionalRex32(dst, src); in mulss()
544 EmitXmmRegisterOperand(dst.LowBits(), src); in mulss()
548 void X86_64Assembler::mulss(XmmRegister dst, const Address& src) { in mulss() argument
551 EmitOptionalRex32(dst, src); in mulss()
554 EmitOperand(dst.LowBits(), src); in mulss()
558 void X86_64Assembler::divss(XmmRegister dst, XmmRegister src) { in divss() argument
561 EmitOptionalRex32(dst, src); in divss()
564 EmitXmmRegisterOperand(dst.LowBits(), src); in divss()
568 void X86_64Assembler::divss(XmmRegister dst, const Address& src) { in divss() argument
571 EmitOptionalRex32(dst, src); in divss()
574 EmitOperand(dst.LowBits(), src); in divss()
578 void X86_64Assembler::addps(XmmRegister dst, XmmRegister src) { in addps() argument
580 EmitOptionalRex32(dst, src); in addps()
583 EmitXmmRegisterOperand(dst.LowBits(), src); in addps()
587 void X86_64Assembler::subps(XmmRegister dst, XmmRegister src) { in subps() argument
589 EmitOptionalRex32(dst, src); in subps()
592 EmitXmmRegisterOperand(dst.LowBits(), src); in subps()
596 void X86_64Assembler::mulps(XmmRegister dst, XmmRegister src) { in mulps() argument
598 EmitOptionalRex32(dst, src); in mulps()
601 EmitXmmRegisterOperand(dst.LowBits(), src); in mulps()
605 void X86_64Assembler::divps(XmmRegister dst, XmmRegister src) { in divps() argument
607 EmitOptionalRex32(dst, src); in divps()
610 EmitXmmRegisterOperand(dst.LowBits(), src); in divps()
614 void X86_64Assembler::flds(const Address& src) { in flds() argument
617 EmitOperand(0, src); in flds()
635 void X86_64Assembler::movapd(XmmRegister dst, XmmRegister src) { in movapd() argument
638 EmitOptionalRex32(dst, src); in movapd()
641 EmitXmmRegisterOperand(dst.LowBits(), src); in movapd()
645 void X86_64Assembler::movapd(XmmRegister dst, const Address& src) { in movapd() argument
648 EmitOptionalRex32(dst, src); in movapd()
651 EmitOperand(dst.LowBits(), src); in movapd()
655 void X86_64Assembler::movupd(XmmRegister dst, const Address& src) { in movupd() argument
658 EmitOptionalRex32(dst, src); in movupd()
661 EmitOperand(dst.LowBits(), src); in movupd()
665 void X86_64Assembler::movapd(const Address& dst, XmmRegister src) { in movapd() argument
668 EmitOptionalRex32(src, dst); in movapd()
671 EmitOperand(src.LowBits(), dst); in movapd()
675 void X86_64Assembler::movupd(const Address& dst, XmmRegister src) { in movupd() argument
678 EmitOptionalRex32(src, dst); in movupd()
681 EmitOperand(src.LowBits(), dst); in movupd()
685 void X86_64Assembler::movsd(XmmRegister dst, const Address& src) { in movsd() argument
688 EmitOptionalRex32(dst, src); in movsd()
691 EmitOperand(dst.LowBits(), src); in movsd()
695 void X86_64Assembler::movsd(const Address& dst, XmmRegister src) { in movsd() argument
698 EmitOptionalRex32(src, dst); in movsd()
701 EmitOperand(src.LowBits(), dst); in movsd()
705 void X86_64Assembler::movsd(XmmRegister dst, XmmRegister src) { in movsd() argument
708 EmitOptionalRex32(src, dst); // Movsd is MR encoding instead of the usual RM. in movsd()
711 EmitXmmRegisterOperand(src.LowBits(), dst); in movsd()
715 void X86_64Assembler::addsd(XmmRegister dst, XmmRegister src) { in addsd() argument
718 EmitOptionalRex32(dst, src); in addsd()
721 EmitXmmRegisterOperand(dst.LowBits(), src); in addsd()
725 void X86_64Assembler::addsd(XmmRegister dst, const Address& src) { in addsd() argument
728 EmitOptionalRex32(dst, src); in addsd()
731 EmitOperand(dst.LowBits(), src); in addsd()
735 void X86_64Assembler::subsd(XmmRegister dst, XmmRegister src) { in subsd() argument
738 EmitOptionalRex32(dst, src); in subsd()
741 EmitXmmRegisterOperand(dst.LowBits(), src); in subsd()
745 void X86_64Assembler::subsd(XmmRegister dst, const Address& src) { in subsd() argument
748 EmitOptionalRex32(dst, src); in subsd()
751 EmitOperand(dst.LowBits(), src); in subsd()
755 void X86_64Assembler::mulsd(XmmRegister dst, XmmRegister src) { in mulsd() argument
758 EmitOptionalRex32(dst, src); in mulsd()
761 EmitXmmRegisterOperand(dst.LowBits(), src); in mulsd()
765 void X86_64Assembler::mulsd(XmmRegister dst, const Address& src) { in mulsd() argument
768 EmitOptionalRex32(dst, src); in mulsd()
771 EmitOperand(dst.LowBits(), src); in mulsd()
775 void X86_64Assembler::divsd(XmmRegister dst, XmmRegister src) { in divsd() argument
778 EmitOptionalRex32(dst, src); in divsd()
781 EmitXmmRegisterOperand(dst.LowBits(), src); in divsd()
785 void X86_64Assembler::divsd(XmmRegister dst, const Address& src) { in divsd() argument
788 EmitOptionalRex32(dst, src); in divsd()
791 EmitOperand(dst.LowBits(), src); in divsd()
795 void X86_64Assembler::addpd(XmmRegister dst, XmmRegister src) { in addpd() argument
798 EmitOptionalRex32(dst, src); in addpd()
801 EmitXmmRegisterOperand(dst.LowBits(), src); in addpd()
805 void X86_64Assembler::subpd(XmmRegister dst, XmmRegister src) { in subpd() argument
808 EmitOptionalRex32(dst, src); in subpd()
811 EmitXmmRegisterOperand(dst.LowBits(), src); in subpd()
815 void X86_64Assembler::mulpd(XmmRegister dst, XmmRegister src) { in mulpd() argument
818 EmitOptionalRex32(dst, src); in mulpd()
821 EmitXmmRegisterOperand(dst.LowBits(), src); in mulpd()
825 void X86_64Assembler::divpd(XmmRegister dst, XmmRegister src) { in divpd() argument
828 EmitOptionalRex32(dst, src); in divpd()
831 EmitXmmRegisterOperand(dst.LowBits(), src); in divpd()
835 void X86_64Assembler::movdqa(XmmRegister dst, XmmRegister src) { in movdqa() argument
838 EmitOptionalRex32(dst, src); in movdqa()
841 EmitXmmRegisterOperand(dst.LowBits(), src); in movdqa()
845 void X86_64Assembler::movdqa(XmmRegister dst, const Address& src) { in movdqa() argument
848 EmitOptionalRex32(dst, src); in movdqa()
851 EmitOperand(dst.LowBits(), src); in movdqa()
855 void X86_64Assembler::movdqu(XmmRegister dst, const Address& src) { in movdqu() argument
858 EmitOptionalRex32(dst, src); in movdqu()
861 EmitOperand(dst.LowBits(), src); in movdqu()
865 void X86_64Assembler::movdqa(const Address& dst, XmmRegister src) { in movdqa() argument
868 EmitOptionalRex32(src, dst); in movdqa()
871 EmitOperand(src.LowBits(), dst); in movdqa()
875 void X86_64Assembler::movdqu(const Address& dst, XmmRegister src) { in movdqu() argument
878 EmitOptionalRex32(src, dst); in movdqu()
881 EmitOperand(src.LowBits(), dst); in movdqu()
885 void X86_64Assembler::paddb(XmmRegister dst, XmmRegister src) { in paddb() argument
888 EmitOptionalRex32(dst, src); in paddb()
891 EmitXmmRegisterOperand(dst.LowBits(), src); in paddb()
895 void X86_64Assembler::psubb(XmmRegister dst, XmmRegister src) { in psubb() argument
898 EmitOptionalRex32(dst, src); in psubb()
901 EmitXmmRegisterOperand(dst.LowBits(), src); in psubb()
905 void X86_64Assembler::paddw(XmmRegister dst, XmmRegister src) { in paddw() argument
908 EmitOptionalRex32(dst, src); in paddw()
911 EmitXmmRegisterOperand(dst.LowBits(), src); in paddw()
915 void X86_64Assembler::psubw(XmmRegister dst, XmmRegister src) { in psubw() argument
918 EmitOptionalRex32(dst, src); in psubw()
921 EmitXmmRegisterOperand(dst.LowBits(), src); in psubw()
925 void X86_64Assembler::pmullw(XmmRegister dst, XmmRegister src) { in pmullw() argument
928 EmitOptionalRex32(dst, src); in pmullw()
931 EmitXmmRegisterOperand(dst.LowBits(), src); in pmullw()
935 void X86_64Assembler::paddd(XmmRegister dst, XmmRegister src) { in paddd() argument
938 EmitOptionalRex32(dst, src); in paddd()
941 EmitXmmRegisterOperand(dst.LowBits(), src); in paddd()
945 void X86_64Assembler::psubd(XmmRegister dst, XmmRegister src) { in psubd() argument
948 EmitOptionalRex32(dst, src); in psubd()
951 EmitXmmRegisterOperand(dst.LowBits(), src); in psubd()
955 void X86_64Assembler::pmulld(XmmRegister dst, XmmRegister src) { in pmulld() argument
958 EmitOptionalRex32(dst, src); in pmulld()
962 EmitXmmRegisterOperand(dst.LowBits(), src); in pmulld()
966 void X86_64Assembler::paddq(XmmRegister dst, XmmRegister src) { in paddq() argument
969 EmitOptionalRex32(dst, src); in paddq()
972 EmitXmmRegisterOperand(dst.LowBits(), src); in paddq()
976 void X86_64Assembler::psubq(XmmRegister dst, XmmRegister src) { in psubq() argument
979 EmitOptionalRex32(dst, src); in psubq()
982 EmitXmmRegisterOperand(dst.LowBits(), src); in psubq()
986 void X86_64Assembler::cvtsi2ss(XmmRegister dst, CpuRegister src) { in cvtsi2ss() argument
987 cvtsi2ss(dst, src, false); in cvtsi2ss()
991 void X86_64Assembler::cvtsi2ss(XmmRegister dst, CpuRegister src, bool is64bit) { in cvtsi2ss() argument
996 EmitRex64(dst, src); in cvtsi2ss()
998 EmitOptionalRex32(dst, src); in cvtsi2ss()
1002 EmitOperand(dst.LowBits(), Operand(src)); in cvtsi2ss()
1006 void X86_64Assembler::cvtsi2ss(XmmRegister dst, const Address& src, bool is64bit) { in cvtsi2ss() argument
1011 EmitRex64(dst, src); in cvtsi2ss()
1013 EmitOptionalRex32(dst, src); in cvtsi2ss()
1017 EmitOperand(dst.LowBits(), src); in cvtsi2ss()
1021 void X86_64Assembler::cvtsi2sd(XmmRegister dst, CpuRegister src) { in cvtsi2sd() argument
1022 cvtsi2sd(dst, src, false); in cvtsi2sd()
1026 void X86_64Assembler::cvtsi2sd(XmmRegister dst, CpuRegister src, bool is64bit) { in cvtsi2sd() argument
1031 EmitRex64(dst, src); in cvtsi2sd()
1033 EmitOptionalRex32(dst, src); in cvtsi2sd()
1037 EmitOperand(dst.LowBits(), Operand(src)); in cvtsi2sd()
1041 void X86_64Assembler::cvtsi2sd(XmmRegister dst, const Address& src, bool is64bit) { in cvtsi2sd() argument
1046 EmitRex64(dst, src); in cvtsi2sd()
1048 EmitOptionalRex32(dst, src); in cvtsi2sd()
1052 EmitOperand(dst.LowBits(), src); in cvtsi2sd()
1056 void X86_64Assembler::cvtss2si(CpuRegister dst, XmmRegister src) { in cvtss2si() argument
1059 EmitOptionalRex32(dst, src); in cvtss2si()
1062 EmitXmmRegisterOperand(dst.LowBits(), src); in cvtss2si()
1066 void X86_64Assembler::cvtss2sd(XmmRegister dst, XmmRegister src) { in cvtss2sd() argument
1069 EmitOptionalRex32(dst, src); in cvtss2sd()
1072 EmitXmmRegisterOperand(dst.LowBits(), src); in cvtss2sd()
1076 void X86_64Assembler::cvtss2sd(XmmRegister dst, const Address& src) { in cvtss2sd() argument
1079 EmitOptionalRex32(dst, src); in cvtss2sd()
1082 EmitOperand(dst.LowBits(), src); in cvtss2sd()
1086 void X86_64Assembler::cvtsd2si(CpuRegister dst, XmmRegister src) { in cvtsd2si() argument
1089 EmitOptionalRex32(dst, src); in cvtsd2si()
1092 EmitXmmRegisterOperand(dst.LowBits(), src); in cvtsd2si()
1096 void X86_64Assembler::cvttss2si(CpuRegister dst, XmmRegister src) { in cvttss2si() argument
1097 cvttss2si(dst, src, false); in cvttss2si()
1101 void X86_64Assembler::cvttss2si(CpuRegister dst, XmmRegister src, bool is64bit) { in cvttss2si() argument
1106 EmitRex64(dst, src); in cvttss2si()
1108 EmitOptionalRex32(dst, src); in cvttss2si()
1112 EmitXmmRegisterOperand(dst.LowBits(), src); in cvttss2si()
1116 void X86_64Assembler::cvttsd2si(CpuRegister dst, XmmRegister src) { in cvttsd2si() argument
1117 cvttsd2si(dst, src, false); in cvttsd2si()
1121 void X86_64Assembler::cvttsd2si(CpuRegister dst, XmmRegister src, bool is64bit) { in cvttsd2si() argument
1126 EmitRex64(dst, src); in cvttsd2si()
1128 EmitOptionalRex32(dst, src); in cvttsd2si()
1132 EmitXmmRegisterOperand(dst.LowBits(), src); in cvttsd2si()
1136 void X86_64Assembler::cvtsd2ss(XmmRegister dst, XmmRegister src) { in cvtsd2ss() argument
1139 EmitOptionalRex32(dst, src); in cvtsd2ss()
1142 EmitXmmRegisterOperand(dst.LowBits(), src); in cvtsd2ss()
1146 void X86_64Assembler::cvtsd2ss(XmmRegister dst, const Address& src) { in cvtsd2ss() argument
1149 EmitOptionalRex32(dst, src); in cvtsd2ss()
1152 EmitOperand(dst.LowBits(), src); in cvtsd2ss()
1156 void X86_64Assembler::cvtdq2ps(XmmRegister dst, XmmRegister src) { in cvtdq2ps() argument
1158 EmitOptionalRex32(dst, src); in cvtdq2ps()
1161 EmitXmmRegisterOperand(dst.LowBits(), src); in cvtdq2ps()
1165 void X86_64Assembler::cvtdq2pd(XmmRegister dst, XmmRegister src) { in cvtdq2pd() argument
1168 EmitOptionalRex32(dst, src); in cvtdq2pd()
1171 EmitXmmRegisterOperand(dst.LowBits(), src); in cvtdq2pd()
1251 void X86_64Assembler::roundsd(XmmRegister dst, XmmRegister src, const Immediate& imm) { in roundsd() argument
1254 EmitOptionalRex32(dst, src); in roundsd()
1258 EmitXmmRegisterOperand(dst.LowBits(), src); in roundsd()
1263 void X86_64Assembler::roundss(XmmRegister dst, XmmRegister src, const Immediate& imm) { in roundss() argument
1266 EmitOptionalRex32(dst, src); in roundss()
1270 EmitXmmRegisterOperand(dst.LowBits(), src); in roundss()
1275 void X86_64Assembler::sqrtsd(XmmRegister dst, XmmRegister src) { in sqrtsd() argument
1278 EmitOptionalRex32(dst, src); in sqrtsd()
1281 EmitXmmRegisterOperand(dst.LowBits(), src); in sqrtsd()
1285 void X86_64Assembler::sqrtss(XmmRegister dst, XmmRegister src) { in sqrtss() argument
1288 EmitOptionalRex32(dst, src); in sqrtss()
1291 EmitXmmRegisterOperand(dst.LowBits(), src); in sqrtss()
1295 void X86_64Assembler::xorpd(XmmRegister dst, const Address& src) { in xorpd() argument
1298 EmitOptionalRex32(dst, src); in xorpd()
1301 EmitOperand(dst.LowBits(), src); in xorpd()
1305 void X86_64Assembler::xorpd(XmmRegister dst, XmmRegister src) { in xorpd() argument
1308 EmitOptionalRex32(dst, src); in xorpd()
1311 EmitXmmRegisterOperand(dst.LowBits(), src); in xorpd()
1315 void X86_64Assembler::xorps(XmmRegister dst, const Address& src) { in xorps() argument
1317 EmitOptionalRex32(dst, src); in xorps()
1320 EmitOperand(dst.LowBits(), src); in xorps()
1324 void X86_64Assembler::xorps(XmmRegister dst, XmmRegister src) { in xorps() argument
1326 EmitOptionalRex32(dst, src); in xorps()
1329 EmitXmmRegisterOperand(dst.LowBits(), src); in xorps()
1333 void X86_64Assembler::pxor(XmmRegister dst, XmmRegister src) { in pxor() argument
1336 EmitOptionalRex32(dst, src); in pxor()
1339 EmitXmmRegisterOperand(dst.LowBits(), src); in pxor()
1343 void X86_64Assembler::andpd(XmmRegister dst, const Address& src) { in andpd() argument
1346 EmitOptionalRex32(dst, src); in andpd()
1349 EmitOperand(dst.LowBits(), src); in andpd()
1352 void X86_64Assembler::andpd(XmmRegister dst, XmmRegister src) { in andpd() argument
1355 EmitOptionalRex32(dst, src); in andpd()
1358 EmitXmmRegisterOperand(dst.LowBits(), src); in andpd()
1361 void X86_64Assembler::andps(XmmRegister dst, XmmRegister src) { in andps() argument
1363 EmitOptionalRex32(dst, src); in andps()
1366 EmitXmmRegisterOperand(dst.LowBits(), src); in andps()
1369 void X86_64Assembler::pand(XmmRegister dst, XmmRegister src) { in pand() argument
1372 EmitOptionalRex32(dst, src); in pand()
1375 EmitXmmRegisterOperand(dst.LowBits(), src); in pand()
1378 void X86_64Assembler::andnpd(XmmRegister dst, XmmRegister src) { in andnpd() argument
1381 EmitOptionalRex32(dst, src); in andnpd()
1384 EmitXmmRegisterOperand(dst.LowBits(), src); in andnpd()
1387 void X86_64Assembler::andnps(XmmRegister dst, XmmRegister src) { in andnps() argument
1389 EmitOptionalRex32(dst, src); in andnps()
1392 EmitXmmRegisterOperand(dst.LowBits(), src); in andnps()
1395 void X86_64Assembler::pandn(XmmRegister dst, XmmRegister src) { in pandn() argument
1398 EmitOptionalRex32(dst, src); in pandn()
1401 EmitXmmRegisterOperand(dst.LowBits(), src); in pandn()
1404 void X86_64Assembler::orpd(XmmRegister dst, XmmRegister src) { in orpd() argument
1407 EmitOptionalRex32(dst, src); in orpd()
1410 EmitXmmRegisterOperand(dst.LowBits(), src); in orpd()
1413 void X86_64Assembler::orps(XmmRegister dst, XmmRegister src) { in orps() argument
1415 EmitOptionalRex32(dst, src); in orps()
1418 EmitXmmRegisterOperand(dst.LowBits(), src); in orps()
1421 void X86_64Assembler::por(XmmRegister dst, XmmRegister src) { in por() argument
1424 EmitOptionalRex32(dst, src); in por()
1427 EmitXmmRegisterOperand(dst.LowBits(), src); in por()
1430 void X86_64Assembler::pavgb(XmmRegister dst, XmmRegister src) { in pavgb() argument
1433 EmitOptionalRex32(dst, src); in pavgb()
1436 EmitXmmRegisterOperand(dst.LowBits(), src); in pavgb()
1439 void X86_64Assembler::pavgw(XmmRegister dst, XmmRegister src) { in pavgw() argument
1442 EmitOptionalRex32(dst, src); in pavgw()
1445 EmitXmmRegisterOperand(dst.LowBits(), src); in pavgw()
1448 void X86_64Assembler::pcmpeqb(XmmRegister dst, XmmRegister src) { in pcmpeqb() argument
1451 EmitOptionalRex32(dst, src); in pcmpeqb()
1454 EmitXmmRegisterOperand(dst.LowBits(), src); in pcmpeqb()
1457 void X86_64Assembler::pcmpeqw(XmmRegister dst, XmmRegister src) { in pcmpeqw() argument
1460 EmitOptionalRex32(dst, src); in pcmpeqw()
1463 EmitXmmRegisterOperand(dst.LowBits(), src); in pcmpeqw()
1466 void X86_64Assembler::pcmpeqd(XmmRegister dst, XmmRegister src) { in pcmpeqd() argument
1469 EmitOptionalRex32(dst, src); in pcmpeqd()
1472 EmitXmmRegisterOperand(dst.LowBits(), src); in pcmpeqd()
1475 void X86_64Assembler::pcmpeqq(XmmRegister dst, XmmRegister src) { in pcmpeqq() argument
1478 EmitOptionalRex32(dst, src); in pcmpeqq()
1482 EmitXmmRegisterOperand(dst.LowBits(), src); in pcmpeqq()
1485 void X86_64Assembler::pcmpgtb(XmmRegister dst, XmmRegister src) { in pcmpgtb() argument
1488 EmitOptionalRex32(dst, src); in pcmpgtb()
1491 EmitXmmRegisterOperand(dst.LowBits(), src); in pcmpgtb()
1494 void X86_64Assembler::pcmpgtw(XmmRegister dst, XmmRegister src) { in pcmpgtw() argument
1497 EmitOptionalRex32(dst, src); in pcmpgtw()
1500 EmitXmmRegisterOperand(dst.LowBits(), src); in pcmpgtw()
1503 void X86_64Assembler::pcmpgtd(XmmRegister dst, XmmRegister src) { in pcmpgtd() argument
1506 EmitOptionalRex32(dst, src); in pcmpgtd()
1509 EmitXmmRegisterOperand(dst.LowBits(), src); in pcmpgtd()
1512 void X86_64Assembler::pcmpgtq(XmmRegister dst, XmmRegister src) { in pcmpgtq() argument
1515 EmitOptionalRex32(dst, src); in pcmpgtq()
1519 EmitXmmRegisterOperand(dst.LowBits(), src); in pcmpgtq()
1522 void X86_64Assembler::shufpd(XmmRegister dst, XmmRegister src, const Immediate& imm) { in shufpd() argument
1525 EmitOptionalRex32(dst, src); in shufpd()
1528 EmitXmmRegisterOperand(dst.LowBits(), src); in shufpd()
1533 void X86_64Assembler::shufps(XmmRegister dst, XmmRegister src, const Immediate& imm) { in shufps() argument
1535 EmitOptionalRex32(dst, src); in shufps()
1538 EmitXmmRegisterOperand(dst.LowBits(), src); in shufps()
1543 void X86_64Assembler::pshufd(XmmRegister dst, XmmRegister src, const Immediate& imm) { in pshufd() argument
1546 EmitOptionalRex32(dst, src); in pshufd()
1549 EmitXmmRegisterOperand(dst.LowBits(), src); in pshufd()
1554 void X86_64Assembler::punpcklbw(XmmRegister dst, XmmRegister src) { in punpcklbw() argument
1557 EmitOptionalRex32(dst, src); in punpcklbw()
1560 EmitXmmRegisterOperand(dst.LowBits(), src); in punpcklbw()
1564 void X86_64Assembler::punpcklwd(XmmRegister dst, XmmRegister src) { in punpcklwd() argument
1567 EmitOptionalRex32(dst, src); in punpcklwd()
1570 EmitXmmRegisterOperand(dst.LowBits(), src); in punpcklwd()
1574 void X86_64Assembler::punpckldq(XmmRegister dst, XmmRegister src) { in punpckldq() argument
1577 EmitOptionalRex32(dst, src); in punpckldq()
1580 EmitXmmRegisterOperand(dst.LowBits(), src); in punpckldq()
1584 void X86_64Assembler::punpcklqdq(XmmRegister dst, XmmRegister src) { in punpcklqdq() argument
1587 EmitOptionalRex32(dst, src); in punpcklqdq()
1590 EmitXmmRegisterOperand(dst.LowBits(), src); in punpcklqdq()
1690 void X86_64Assembler::fldl(const Address& src) { in fldl() argument
1693 EmitOperand(0, src); in fldl()
1726 void X86_64Assembler::fldcw(const Address& src) { in fldcw() argument
1729 EmitOperand(5, src); in fldcw()
1747 void X86_64Assembler::fildl(const Address& src) { in fildl() argument
1750 EmitOperand(5, src); in fildl()
1754 void X86_64Assembler::filds(const Address& src) { in filds() argument
1757 EmitOperand(0, src); in filds()
1810 void X86_64Assembler::xchgl(CpuRegister dst, CpuRegister src) { in xchgl() argument
1815 const bool src_rax = src.AsRegister() == RAX; in xchgl()
1818 EmitOptionalRex32(src_rax ? dst : src); in xchgl()
1819 EmitUint8(0x90 + (src_rax ? dst.LowBits() : src.LowBits())); in xchgl()
1824 EmitOptionalRex32(src, dst); in xchgl()
1826 EmitRegisterOperand(src.LowBits(), dst.LowBits()); in xchgl()
1830 void X86_64Assembler::xchgq(CpuRegister dst, CpuRegister src) { in xchgq() argument
1835 const bool src_rax = src.AsRegister() == RAX; in xchgq()
1842 EmitRex64(src_rax ? dst : src); in xchgq()
1843 EmitUint8(0x90 + (src_rax ? dst.LowBits() : src.LowBits())); in xchgq()
1849 EmitRex64(src, dst); in xchgq()
1851 EmitRegisterOperand(src.LowBits(), dst.LowBits()); in xchgq()
1954 void X86_64Assembler::addl(CpuRegister dst, CpuRegister src) { in addl() argument
1956 EmitOptionalRex32(dst, src); in addl()
1958 EmitRegisterOperand(dst.LowBits(), src.LowBits()); in addl()
2047 void X86_64Assembler::andl(CpuRegister dst, CpuRegister src) { in andl() argument
2049 EmitOptionalRex32(dst, src); in andl()
2051 EmitOperand(dst.LowBits(), Operand(src)); in andl()
2078 void X86_64Assembler::andq(CpuRegister dst, CpuRegister src) { in andq() argument
2080 EmitRex64(dst, src); in andq()
2082 EmitOperand(dst.LowBits(), Operand(src)); in andq()
2086 void X86_64Assembler::andq(CpuRegister dst, const Address& src) { in andq() argument
2088 EmitRex64(dst, src); in andq()
2090 EmitOperand(dst.LowBits(), src); in andq()
2094 void X86_64Assembler::orl(CpuRegister dst, CpuRegister src) { in orl() argument
2096 EmitOptionalRex32(dst, src); in orl()
2098 EmitOperand(dst.LowBits(), Operand(src)); in orl()
2125 void X86_64Assembler::orq(CpuRegister dst, CpuRegister src) { in orq() argument
2127 EmitRex64(dst, src); in orq()
2129 EmitOperand(dst.LowBits(), Operand(src)); in orq()
2133 void X86_64Assembler::orq(CpuRegister dst, const Address& src) { in orq() argument
2135 EmitRex64(dst, src); in orq()
2137 EmitOperand(dst.LowBits(), src); in orq()
2141 void X86_64Assembler::xorl(CpuRegister dst, CpuRegister src) { in xorl() argument
2143 EmitOptionalRex32(dst, src); in xorl()
2145 EmitOperand(dst.LowBits(), Operand(src)); in xorl()
2164 void X86_64Assembler::xorq(CpuRegister dst, CpuRegister src) { in xorq() argument
2166 EmitRex64(dst, src); in xorq()
2168 EmitOperand(dst.LowBits(), Operand(src)); in xorq()
2179 void X86_64Assembler::xorq(CpuRegister dst, const Address& src) { in xorq() argument
2181 EmitRex64(dst, src); in xorq()
2183 EmitOperand(dst.LowBits(), src); in xorq()
2237 void rex_mem_reg(bool force, bool w, Address* mem, Register* src);
2263 void X86_64Assembler::addq(CpuRegister dst, CpuRegister src) { in addq() argument
2266 EmitRex64(src, dst); in addq()
2268 EmitRegisterOperand(src.LowBits(), dst.LowBits()); in addq()
2287 void X86_64Assembler::subl(CpuRegister dst, CpuRegister src) { in subl() argument
2289 EmitOptionalRex32(dst, src); in subl()
2291 EmitOperand(dst.LowBits(), Operand(src)); in subl()
2310 void X86_64Assembler::subq(CpuRegister dst, CpuRegister src) { in subq() argument
2312 EmitRex64(dst, src); in subq()
2314 EmitRegisterOperand(dst.LowBits(), src.LowBits()); in subq()
2363 void X86_64Assembler::imull(CpuRegister dst, CpuRegister src) { in imull() argument
2365 EmitOptionalRex32(dst, src); in imull()
2368 EmitOperand(dst.LowBits(), Operand(src)); in imull()
2371 void X86_64Assembler::imull(CpuRegister dst, CpuRegister src, const Immediate& imm) { in imull() argument
2375 EmitOptionalRex32(dst, src); in imull()
2382 EmitOperand(dst.LowBits(), Operand(src)); in imull()
2387 EmitOperand(dst.LowBits(), Operand(src)); in imull()
2407 void X86_64Assembler::imulq(CpuRegister dst, CpuRegister src) { in imulq() argument
2409 EmitRex64(dst, src); in imulq()
2412 EmitRegisterOperand(dst.LowBits(), src.LowBits()); in imulq()
2864 void X86_64Assembler::bsfl(CpuRegister dst, CpuRegister src) { in bsfl() argument
2866 EmitOptionalRex32(dst, src); in bsfl()
2869 EmitRegisterOperand(dst.LowBits(), src.LowBits()); in bsfl()
2872 void X86_64Assembler::bsfl(CpuRegister dst, const Address& src) { in bsfl() argument
2874 EmitOptionalRex32(dst, src); in bsfl()
2877 EmitOperand(dst.LowBits(), src); in bsfl()
2880 void X86_64Assembler::bsfq(CpuRegister dst, CpuRegister src) { in bsfq() argument
2882 EmitRex64(dst, src); in bsfq()
2885 EmitRegisterOperand(dst.LowBits(), src.LowBits()); in bsfq()
2888 void X86_64Assembler::bsfq(CpuRegister dst, const Address& src) { in bsfq() argument
2890 EmitRex64(dst, src); in bsfq()
2893 EmitOperand(dst.LowBits(), src); in bsfq()
2896 void X86_64Assembler::bsrl(CpuRegister dst, CpuRegister src) { in bsrl() argument
2898 EmitOptionalRex32(dst, src); in bsrl()
2901 EmitRegisterOperand(dst.LowBits(), src.LowBits()); in bsrl()
2904 void X86_64Assembler::bsrl(CpuRegister dst, const Address& src) { in bsrl() argument
2906 EmitOptionalRex32(dst, src); in bsrl()
2909 EmitOperand(dst.LowBits(), src); in bsrl()
2912 void X86_64Assembler::bsrq(CpuRegister dst, CpuRegister src) { in bsrq() argument
2914 EmitRex64(dst, src); in bsrq()
2917 EmitRegisterOperand(dst.LowBits(), src.LowBits()); in bsrq()
2920 void X86_64Assembler::bsrq(CpuRegister dst, const Address& src) { in bsrq() argument
2922 EmitRex64(dst, src); in bsrq()
2925 EmitOperand(dst.LowBits(), src); in bsrq()
2928 void X86_64Assembler::popcntl(CpuRegister dst, CpuRegister src) { in popcntl() argument
2931 EmitOptionalRex32(dst, src); in popcntl()
2934 EmitRegisterOperand(dst.LowBits(), src.LowBits()); in popcntl()
2937 void X86_64Assembler::popcntl(CpuRegister dst, const Address& src) { in popcntl() argument
2940 EmitOptionalRex32(dst, src); in popcntl()
2943 EmitOperand(dst.LowBits(), src); in popcntl()
2946 void X86_64Assembler::popcntq(CpuRegister dst, CpuRegister src) { in popcntq() argument
2949 EmitRex64(dst, src); in popcntq()
2952 EmitRegisterOperand(dst.LowBits(), src.LowBits()); in popcntq()
2955 void X86_64Assembler::popcntq(CpuRegister dst, const Address& src) { in popcntq() argument
2958 EmitRex64(dst, src); in popcntq()
2961 EmitOperand(dst.LowBits(), src); in popcntq()
3196 void X86_64Assembler::EmitOptionalRex32(CpuRegister dst, CpuRegister src) { in EmitOptionalRex32() argument
3197 EmitOptionalRex(false, false, dst.NeedsRex(), false, src.NeedsRex()); in EmitOptionalRex32()
3200 void X86_64Assembler::EmitOptionalRex32(XmmRegister dst, XmmRegister src) { in EmitOptionalRex32() argument
3201 EmitOptionalRex(false, false, dst.NeedsRex(), false, src.NeedsRex()); in EmitOptionalRex32()
3204 void X86_64Assembler::EmitOptionalRex32(CpuRegister dst, XmmRegister src) { in EmitOptionalRex32() argument
3205 EmitOptionalRex(false, false, dst.NeedsRex(), false, src.NeedsRex()); in EmitOptionalRex32()
3208 void X86_64Assembler::EmitOptionalRex32(XmmRegister dst, CpuRegister src) { in EmitOptionalRex32() argument
3209 EmitOptionalRex(false, false, dst.NeedsRex(), false, src.NeedsRex()); in EmitOptionalRex32()
3253 void X86_64Assembler::EmitRex64(CpuRegister dst, CpuRegister src) { in EmitRex64() argument
3254 EmitOptionalRex(false, true, dst.NeedsRex(), false, src.NeedsRex()); in EmitRex64()
3257 void X86_64Assembler::EmitRex64(XmmRegister dst, CpuRegister src) { in EmitRex64() argument
3258 EmitOptionalRex(false, true, dst.NeedsRex(), false, src.NeedsRex()); in EmitRex64()
3261 void X86_64Assembler::EmitRex64(CpuRegister dst, XmmRegister src) { in EmitRex64() argument
3262 EmitOptionalRex(false, true, dst.NeedsRex(), false, src.NeedsRex()); in EmitRex64()
3281 void X86_64Assembler::EmitOptionalByteRegNormalizingRex32(CpuRegister dst, CpuRegister src) { in EmitOptionalByteRegNormalizingRex32() argument
3283 bool force = src.AsRegister() > 3; in EmitOptionalByteRegNormalizingRex32()
3284 EmitOptionalRex(force, false, dst.NeedsRex(), false, src.NeedsRex()); in EmitOptionalByteRegNormalizingRex32()